drm/i915: add WRPLL clocks
authorEugeni Dodonov <eugeni.dodonov@intel.com>
Thu, 29 Mar 2012 15:32:36 +0000 (12:32 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 9 Apr 2012 16:04:04 +0000 (18:04 +0200)
The WR PLL can drive the DDI ports at fixed frequencies for HDMI, DVI, DP
and FDI.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h

index 8c44fe0..fa4d1d3 100644 (file)
 #define  SPLL_PLL_FREQ_810MHz  (0<<26)
 #define  SPLL_PLL_FREQ_1350MHz (1<<26)
 
+/* WRPLL */
+#define WRPLL_CTL1                             0x46040
+#define WRPLL_CTL2                             0x46060
+#define  WRPLL_PLL_ENABLE                              (1<<31)
+#define  WRPLL_PLL_SELECT_SSC                  (0x01<<28)
+#define  WRPLL_PLL_SELECT_NON_SCC              (0x02<<28)
+#define  WRPLL_PLL_SELECT_LCPLL_2700   (0x03<<28)
+
 /* Port clock selection */
 #define PORT_CLK_SEL_A                 0x46100
 #define PORT_CLK_SEL_B                 0x46104