ARM: dts: at91: sama7g5/sama7g5ek: align DT with kernel 6.1
authorEugen Hristev <eugen.hristev@microchip.com>
Fri, 25 Nov 2022 07:54:53 +0000 (09:54 +0200)
committerEugen Hristev <eugen.hristev@microchip.com>
Tue, 20 Dec 2022 09:59:07 +0000 (11:59 +0200)
Align the DT with current Linux 6.1 tree, wherever possible.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
arch/arm/dts/at91-sama7g5ek.dts
arch/arm/dts/sama7g5.dtsi

index aed84f1..9b247fc 100644 (file)
                };
        };
 
-       gpio_keys {
+       gpio-keys {
                compatible = "gpio-keys";
 
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_key_gpio_default>;
 
-               bp1 {
+               button {
                        label = "PB_USER";
                        gpios = <&pioA PIN_PA12 GPIO_ACTIVE_LOW>;
                        linux,code = <KEY_PROG1>;
                        regulators {
                                vdd_3v3: VDD_IO {
                                        regulator-name = "VDD_IO";
-                                       regulator-min-microvolt = <1200000>;
-                                       regulator-max-microvolt = <3700000>;
+                                       regulator-min-microvolt = <3300000>;
+                                       regulator-max-microvolt = <3300000>;
                                        regulator-initial-mode = <2>;
                                        regulator-allowed-modes = <2>, <4>;
                                        regulator-always-on;
 
                                vddioddr: VDD_DDR {
                                        regulator-name = "VDD_DDR";
-                                       regulator-min-microvolt = <1300000>;
-                                       regulator-max-microvolt = <1450000>;
+                                       regulator-min-microvolt = <1350000>;
+                                       regulator-max-microvolt = <1350000>;
                                        regulator-initial-mode = <2>;
                                        regulator-allowed-modes = <2>, <4>;
                                        regulator-always-on;
 
                                vddcore: VDD_CORE {
                                        regulator-name = "VDD_CORE";
-                                       regulator-min-microvolt = <1100000>;
-                                       regulator-max-microvolt = <1850000>;
+                                       regulator-min-microvolt = <1150000>;
+                                       regulator-max-microvolt = <1150000>;
                                        regulator-initial-mode = <2>;
                                        regulator-allowed-modes = <2>, <4>;
                                        regulator-always-on;
                                vddcpu: VDD_OTHER {
                                        regulator-name = "VDD_OTHER";
                                        regulator-min-microvolt = <1050000>;
-                                       regulator-max-microvolt = <1850000>;
+                                       regulator-max-microvolt = <1250000>;
                                        regulator-initial-mode = <2>;
                                        regulator-allowed-modes = <2>, <4>;
                                        regulator-ramp-delay = <3125>;
 
                                vldo1: LDO1 {
                                        regulator-name = "LDO1";
-                                       regulator-min-microvolt = <1200000>;
-                                       regulator-max-microvolt = <3700000>;
+                                       regulator-min-microvolt = <1800000>;
+                                       regulator-max-microvolt = <1800000>;
                                        regulator-always-on;
 
                                        regulator-state-standby {
                ck_cd_rstn_vddsel {
                        pinmux = <PIN_PA0__SDMMC0_CK>,
                                 <PIN_PA2__SDMMC0_RSTN>,
-                                <PIN_PA14__SDMMC0_CD>,
                                 <PIN_PA11__SDMMC0_DS>;
                        slew-rate = <0>;
                        bias-pull-up;
index d38090d..6388a60 100644 (file)
@@ -15,6 +15,7 @@
 #include <dt-bindings/clk/at91.h>
 #include <dt-bindings/dma/at91.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/mfd/at91-usart.h>
 
 / {
        model = "Microchip SAMA7G5 family SoC";
                                <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
                        gpio-controller;
                        #gpio-cells = <2>;
+                       clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
                };
 
                pmc: pmc@e0018000 {
                        clock-names = "td_slck", "md_slck", "main_xtal", "main_rc";
                };
 
+               reset_controller: reset-controller@e001d000 {
+                       compatible = "microchip,sama7g5-rstc";
+                       reg = <0xe001d000 0xc>, <0xe001d0e4 0x4>;
+                       #reset-cells = <1>;
+                       clocks = <&clk32k 0>;
+               };
+
                shdwc: shdwc@e001d010 {
                        compatible = "microchip,sama7g5-shdwc", "syscon";
                        reg = <0xe001d010 0x10>;
                        clocks = <&clk32k 0>;
                };
 
-               reset_controller: rstc@e001d000 {
-                       compatible = "microchip,sama7g5-rstc", "microchip,sam9x60-rstc";
-                       reg = <0xe001d000 0xc>, <0xe001d0e4 0x4>;
-                       #reset-cells = <1>;
-                       clocks = <&clk32k 0>;
-               };
-
                clk32k: clock-controller@e001d050 {
                        compatible = "microchip,sama7g5-sckc", "microchip,sam9x60-sckc";
                        reg = <0xe001d050 0x4>;
                        uart0: serial@200 {
                                compatible = "atmel,at91sam9260-usart";
                                reg = <0x200 0x200>;
+                               atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
                                interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
                                clock-names = "usart";
                        uart3: serial@200 {
                                compatible = "atmel,at91sam9260-usart";
                                reg = <0x200 0x200>;
+                               atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
                                interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
                                clock-names = "usart";
                        uart4: serial@200 {
                                compatible = "atmel,at91sam9260-usart";
                                reg = <0x200 0x200>;
+                               atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
                                interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
                                clock-names = "usart";
                        uart7: serial@200 {
                                compatible = "atmel,at91sam9260-usart";
                                reg = <0x200 0x200>;
+                               atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
                                interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
                                clock-names = "usart";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                atmel,fifo-size = <32>;
-                               dmas = <&dma0 AT91_XDMAC_DT_PERID(27)>,
-                                           <&dma0 AT91_XDMAC_DT_PERID(28)>;
-                               dma-names = "rx", "tx";
+                               dmas = <&dma0 AT91_XDMAC_DT_PERID(28)>,
+                                           <&dma0 AT91_XDMAC_DT_PERID(27)>;
+                               dma-names = "tx", "rx";
                                status = "disabled";
                        };
                };