net/mlx5: Enable QP number request when creating IPoIB underlay QP
authorMichael Guralnik <michaelgur@mellanox.com>
Wed, 20 May 2020 10:59:06 +0000 (13:59 +0300)
committerLeon Romanovsky <leonro@mellanox.com>
Fri, 3 Jul 2020 15:38:01 +0000 (18:38 +0300)
If in the process of creating the underlay QP for an IPoIB interface
the user has set the address and specifically the 1st-3rd bytes
representing the QP number, use the requested QP number when creating
the underlay QP.

For a user to be able to request a QP number on QP creation, the MKEY_BY_NAME
NVCONFIG should be set. As mkey_by_name and qp_by_name are coupled in FW.
This requires driver to query the mkey_by_name max cap during initialization
and set the current cap if it was enabled in FW.

Signed-off-by: Michael Guralnik <michaelgur@mellanox.com>
Reviewed-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c
drivers/net/ethernet/mellanox/mlx5/core/main.c
include/linux/mlx5/mlx5_ifc.h

index 690b822..d1266d8 100644 (file)
@@ -226,13 +226,20 @@ void mlx5i_uninit_underlay_qp(struct mlx5e_priv *priv)
 
 int mlx5i_create_underlay_qp(struct mlx5e_priv *priv)
 {
+       unsigned char *dev_addr = priv->netdev->dev_addr;
        u32 out[MLX5_ST_SZ_DW(create_qp_out)] = {};
        u32 in[MLX5_ST_SZ_DW(create_qp_in)] = {};
        struct mlx5i_priv *ipriv = priv->ppriv;
        void *addr_path;
+       int qpn = 0;
        int ret = 0;
        void *qpc;
 
+       if (MLX5_CAP_GEN(priv->mdev, mkey_by_name)) {
+               qpn = (dev_addr[1] << 16) + (dev_addr[2] << 8) + dev_addr[3];
+               MLX5_SET(create_qp_in, in, input_qpn, qpn);
+       }
+
        qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
        MLX5_SET(qpc, qpc, st, MLX5_QP_ST_UD);
        MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
index 8b65890..623785f 100644 (file)
@@ -557,6 +557,9 @@ static int handle_hca_cap(struct mlx5_core_dev *dev, void *set_ctx)
        if (MLX5_CAP_GEN_MAX(dev, release_all_pages))
                MLX5_SET(cmd_hca_cap, set_hca_cap, release_all_pages, 1);
 
+       if (MLX5_CAP_GEN_MAX(dev, mkey_by_name))
+               MLX5_SET(cmd_hca_cap, set_hca_cap, mkey_by_name, 1);
+
        return set_caps(dev, set_ctx, MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE);
 }
 
index a227518..3786888 100644 (file)
@@ -1392,7 +1392,10 @@ struct mlx5_ifc_cmd_hca_cap_bits {
        u8         bf[0x1];
        u8         driver_version[0x1];
        u8         pad_tx_eth_packet[0x1];
-       u8         reserved_at_263[0x8];
+       u8         reserved_at_263[0x3];
+       u8         mkey_by_name[0x1];
+       u8         reserved_at_267[0x4];
+
        u8         log_bf_reg_size[0x5];
 
        u8         reserved_at_270[0x8];
@@ -7712,8 +7715,10 @@ struct mlx5_ifc_create_qp_in_bits {
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];
 
-       u8         reserved_at_40[0x40];
+       u8         reserved_at_40[0x8];
+       u8         input_qpn[0x18];
 
+       u8         reserved_at_60[0x20];
        u8         opt_param_mask[0x20];
 
        u8         ece[0x20];