ARM: dts: am335x-pcm-953: Remove eth phy delay
authorTeresa Remmet <t.remmet@phytec.de>
Fri, 24 May 2019 13:20:02 +0000 (15:20 +0200)
committerTony Lindgren <tony@atomide.com>
Mon, 10 Jun 2019 12:06:38 +0000 (05:06 -0700)
Default values fit better than these historical settings.
Hardware layout had been adapted accordingly already in
alpha stage. They did not cause problems for a long time.
Removed values now.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/am335x-pcm-953.dtsi

index 3d8d2cd..40a7c63 100644 (file)
 &davinci_mdio {
        phy1: ethernet-phy@2 {
                reg = <2>;
-
-               /* Register 260 (104h) – RGMII Clock and Control Pad Skew */
-               rxc-skew-ps = <1400>;
-               rxdv-skew-ps = <0>;
-               txc-skew-ps = <1400>;
-               txen-skew-ps = <0>;
-               /* Register 261 (105h) – RGMII RX Data Pad Skew */
-               rxd3-skew-ps = <0>;
-               rxd2-skew-ps = <0>;
-               rxd1-skew-ps = <0>;
-               rxd0-skew-ps = <0>;
-               /* Register 262 (106h) – RGMII TX Data Pad Skew */
-               txd3-skew-ps = <0>;
-               txd2-skew-ps = <0>;
-               txd1-skew-ps = <0>;
-               txd0-skew-ps = <0>;
        };
 };