mips: Implement {in, out}_{le, be}_{16, 32, 64} and {in, out}_8

MIPS is the only architecture currently supported by U-Boot that does
not implement any of the in/out register access functions.

To have a interface that is useable across architectures, add the
functions to the MIPS architecture (implemented using the __raw_write
and __raw_read functions).

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>

diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 957442e..7c40e41 100644 (file)
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -547,6 +547,28 @@ __BUILD_CLRSETBITS(bwlq, sfx, end, type)
 #define __to_cpu(v)            (v)
 #define cpu_to__(v)            (v)
 
+#define out_arch(type, endian, a, v)   __raw_write##type(cpu_to_##endian(v),a)
+#define in_arch(type, endian, a)       endian##_to_cpu(__raw_read##type(a))
+
+#define out_le64(a, v) out_arch(q, le64, a, v)
+#define out_le32(a, v) out_arch(l, le32, a, v)
+#define out_le16(a, v) out_arch(w, le16, a, v)
+
+#define in_le64(a)     in_arch(q, le64, a)
+#define in_le32(a)     in_arch(l, le32, a)
+#define in_le16(a)     in_arch(w, le16, a)
+
+#define out_be64(a, v) out_arch(q, be64, a, v)
+#define out_be32(a, v) out_arch(l, be32, a, v)
+#define out_be16(a, v) out_arch(w, be16, a, v)
+
+#define in_be64(a)     in_arch(q, be64, a)
+#define in_be32(a)     in_arch(l, be32, a)
+#define in_be16(a)     in_arch(w, be16, a)
+
+#define out_8(a, v)    __raw_writeb(v, a)
+#define in_8(a)                __raw_readb(a)
+
 BUILD_CLRSETBITS(b, 8, _, u8)
 BUILD_CLRSETBITS(w, le16, le16, u16)
 BUILD_CLRSETBITS(w, be16, be16, u16)