clk: rockchip: fix the clk config to support module build
authorElaine Zhang <zhangqing@rock-chips.com>
Mon, 14 Sep 2020 02:23:04 +0000 (10:23 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Tue, 22 Sep 2020 13:16:38 +0000 (15:16 +0200)
use CONFIG_COMMON_CLK_ROCKCHIP for Rk common clk drivers.
use CONFIG_CLK_RKXX for Rk soc clk driver.
Mark CONFIG_CLK_RK3399 to "tristate",
to support building Rk3399 SoC clock driver as module.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200914022304.23908-1-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/Kconfig
drivers/clk/rockchip/Kconfig [new file with mode: 0644]
drivers/clk/rockchip/Makefile

index 4026fac..b41aaed 100644 (file)
@@ -373,6 +373,7 @@ source "drivers/clk/meson/Kconfig"
 source "drivers/clk/mvebu/Kconfig"
 source "drivers/clk/qcom/Kconfig"
 source "drivers/clk/renesas/Kconfig"
+source "drivers/clk/rockchip/Kconfig"
 source "drivers/clk/samsung/Kconfig"
 source "drivers/clk/sifive/Kconfig"
 source "drivers/clk/sprd/Kconfig"
diff --git a/drivers/clk/rockchip/Kconfig b/drivers/clk/rockchip/Kconfig
new file mode 100644 (file)
index 0000000..524b0e0
--- /dev/null
@@ -0,0 +1,78 @@
+# SPDX-License-Identifier: GPL-2.0
+# common clock support for ROCKCHIP SoC family.
+
+config COMMON_CLK_ROCKCHIP
+       bool "Rockchip clock controller common support"
+       depends on ARCH_ROCKCHIP
+       default ARCH_ROCKCHIP
+       help
+         Say y here to enable common clock controller for Rockchip platforms.
+
+if COMMON_CLK_ROCKCHIP
+config CLK_PX30
+       bool "Rockchip PX30 clock controller support"
+       default y
+       help
+         Build the driver for PX30 Clock Driver.
+
+config CLK_RV110X
+       bool "Rockchip RV110x clock controller support"
+       default y
+       help
+         Build the driver for RV110x Clock Driver.
+
+config CLK_RK3036
+       bool "Rockchip RK3036 clock controller support"
+       default y
+       help
+         Build the driver for RK3036 Clock Driver.
+
+config CLK_RK312X
+       bool "Rockchip RK312x clock controller support"
+       default y
+       help
+         Build the driver for RK312x Clock Driver.
+
+config CLK_RK3188
+       bool "Rockchip RK3188 clock controller support"
+       default y
+       help
+         Build the driver for RK3188 Clock Driver.
+
+config CLK_RK322X
+       bool "Rockchip RK322x clock controller support"
+       default y
+       help
+         Build the driver for RK322x Clock Driver.
+
+config CLK_RK3288
+       bool "Rockchip RK3288 clock controller support"
+       depends on ARM
+       default y
+       help
+         Build the driver for RK3288 Clock Driver.
+
+config CLK_RK3308
+       bool "Rockchip RK3308 clock controller support"
+       default y
+       help
+         Build the driver for RK3308 Clock Driver.
+
+config CLK_RK3328
+       bool "Rockchip RK3328 clock controller support"
+       default y
+       help
+         Build the driver for RK3328 Clock Driver.
+
+config CLK_RK3368
+       bool "Rockchip RK3368 clock controller support"
+       default y
+       help
+         Build the driver for RK3368 Clock Driver.
+
+config CLK_RK3399
+       bool "Rockchip RK3399 clock controller support"
+       default y
+       help
+         Build the driver for RK3399 Clock Driver.
+endif
index 7c5b581..a99e4d9 100644 (file)
@@ -3,24 +3,26 @@
 # Rockchip Clock specific Makefile
 #
 
-obj-y  += clk.o
-obj-y  += clk-pll.o
-obj-y  += clk-cpu.o
-obj-y  += clk-half-divider.o
-obj-y  += clk-inverter.o
-obj-y  += clk-mmc-phase.o
-obj-y  += clk-muxgrf.o
-obj-y  += clk-ddr.o
-obj-$(CONFIG_RESET_CONTROLLER) += softrst.o
+obj-$(CONFIG_COMMON_CLK_ROCKCHIP) += clk-rockchip.o
 
-obj-y  += clk-px30.o
-obj-y  += clk-rv1108.o
-obj-y  += clk-rk3036.o
-obj-y  += clk-rk3128.o
-obj-y  += clk-rk3188.o
-obj-y  += clk-rk3228.o
-obj-y  += clk-rk3288.o
-obj-y  += clk-rk3308.o
-obj-y  += clk-rk3328.o
-obj-y  += clk-rk3368.o
-obj-y  += clk-rk3399.o
+clk-rockchip-y += clk.o
+clk-rockchip-y += clk-pll.o
+clk-rockchip-y += clk-cpu.o
+clk-rockchip-y += clk-half-divider.o
+clk-rockchip-y += clk-inverter.o
+clk-rockchip-y += clk-mmc-phase.o
+clk-rockchip-y += clk-muxgrf.o
+clk-rockchip-y += clk-ddr.o
+clk-rockchip-$(CONFIG_RESET_CONTROLLER) += softrst.o
+
+obj-$(CONFIG_CLK_PX30)          += clk-px30.o
+obj-$(CONFIG_CLK_RV110X)        += clk-rv1108.o
+obj-$(CONFIG_CLK_RK3036)        += clk-rk3036.o
+obj-$(CONFIG_CLK_RK312X)        += clk-rk3128.o
+obj-$(CONFIG_CLK_RK3188)        += clk-rk3188.o
+obj-$(CONFIG_CLK_RK322X)        += clk-rk3228.o
+obj-$(CONFIG_CLK_RK3288)        += clk-rk3288.o
+obj-$(CONFIG_CLK_RK3308)        += clk-rk3308.o
+obj-$(CONFIG_CLK_RK3328)        += clk-rk3328.o
+obj-$(CONFIG_CLK_RK3368)        += clk-rk3368.o
+obj-$(CONFIG_CLK_RK3399)        += clk-rk3399.o