Fix display of RL78 MOVW instructions that use the stack pointer.

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

	* testsuite/gas/rl78/sp-relative-movw.s: New test.
	* testsuite/gas/rl78/sp-relative-movw.d: Expected disassembly.
	* testsuite/gas/rl78/rl78.exp: Run the new test.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 97f3a03..59e31a7 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2016-01-14  Nick Clifton  <nickc@redhat.com>
+
+       * testsuite/gas/rl78/sp-relative-movw.s: New test.
+       * testsuite/gas/rl78/sp-relative-movw.d: Expected disassembly.
+       * testsuite/gas/rl78/rl78.exp: Run the new test.
+
 2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
 
        * testsuite/gas/aarch64/illegal-sysreg-2.l: New.

diff --git a/gas/testsuite/gas/rl78/rl78.exp b/gas/testsuite/gas/rl78/rl78.exp
index f03056b..d9d0ced 100644 (file)
--- a/gas/testsuite/gas/rl78/rl78.exp
+++ b/gas/testsuite/gas/rl78/rl78.exp
@@ -22,4 +22,5 @@ if [expr [istarget "rl78-*-*"]]  then {
     run_dump_test "pr19157"
     run_dump_test "pr19158"
     run_dump_test "pr19159"
+    run_dump_test "sp-relative-movw"
 }

diff --git a/gas/testsuite/gas/rl78/sp-relative-movw.d b/gas/testsuite/gas/rl78/sp-relative-movw.d
new file mode 100644 (file)
index 0000000..b05f09d
--- /dev/null
+++ b/gas/testsuite/gas/rl78/sp-relative-movw.d
@@ -0,0 +1,14 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: RL78: correct display of SP-relative movw instructions
+
+.*: +file format .*rl78.*
+
+Disassembly of section .text:
+0x0+000 cb f8 34 12[    ]+movw sp, #0x1234
+0x0+004 ae f8[  ]+movw ax, sp
+0x0+006 be f8[  ]+movw sp, ax
+0x0+008 af f8 ff[       ]+movw ax, !0x000ffff8
+0x0+00b bf f8 ff[       ]+movw !0x000ffff8, ax
+0x0+00e fb f8 ff[       ]+movw hl, sp
+0x0+011 db f8 ff[       ]+movw bc, sp
+0x0+014 eb f8 ff[       ]+movw de, sp

diff --git a/gas/testsuite/gas/rl78/sp-relative-movw.s b/gas/testsuite/gas/rl78/sp-relative-movw.s
new file mode 100644 (file)
index 0000000..b6ace3d
--- /dev/null
+++ b/gas/testsuite/gas/rl78/sp-relative-movw.s
@@ -0,0 +1,9 @@
+               movw   sp, #0x1234
+               movw   ax, sp
+               movw   sp, ax
+               movw   ax, !0xffff8
+               movw   !0xffff8, ax
+               movw   hl, sp
+               movw   bc, sp
+               movw   de, sp
+  
\ No newline at end of file

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 37e9a6e..64d342d 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,11 @@
+2016-01-14  Nick Clifton  <nickc@redhat.com>
+
+       * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
+       instructions that can support stack pointer operations.
+       * rl78-decode.c: Regenerate.
+       * rl78-dis.c: Fix display of stack pointer in MOVW based
+       instructions.
+
 2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
 
        * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals

diff --git a/opcodes/rl78-decode.c b/opcodes/rl78-decode.c
index 0103850..9c39156 100644 (file)
--- a/opcodes/rl78-decode.c
+++ b/opcodes/rl78-decode.c
@@ -5347,7 +5347,7 @@ rl78_decode_opcode (unsigned long pc AU,
                      op[0]);
               printf ("  ra = 0x%x\n", ra);
             }
-          SYNTAX("movw %0, %e!1");
+          SYNTAX("movw %0, %es!1");
 #line 886 "rl78-decode.opc"
           ID(mov); W(); DRW(ra); SM(None, IMMU(2));
 

diff --git a/opcodes/rl78-decode.opc b/opcodes/rl78-decode.opc
index 94cb67b..57e79ed 100644 (file)
--- a/opcodes/rl78-decode.opc
+++ b/opcodes/rl78-decode.opc
@@ -882,7 +882,7 @@ rl78_decode_opcode (unsigned long pc AU,
 /** 1010 1110                  movw    %0, %s1                         */
   ID(mov); W(); DR(AX); SM(None, SFR);
 
-/** 11ra 1011                  movw    %0, %e!1                        */
+/** 11ra 1011                  movw    %0, %es!1                       */
   ID(mov); W(); DRW(ra); SM(None, IMMU(2));
 
 /** 11ra 1010                  movw    %0, %1                          */

diff --git a/opcodes/rl78-dis.c b/opcodes/rl78-dis.c
index dd4f086..6784e53 100644 (file)
--- a/opcodes/rl78-dis.c
+++ b/opcodes/rl78-dis.c
@@ -227,7 +227,17 @@ print_insn_rl78_common (bfd_vma addr, disassemble_info * dis, RL78_Dis_Isa isa)
              }
 
            if (do_bang)
-             PC ('!');
+             {
+               /* If we are going to display SP by name, we must omit the bang.  */
+               if ((oper->type == RL78_Operand_Indirect || RL78_Operand_BitIndirect)
+                   && oper->reg == RL78_Reg_None
+                   && do_sfr
+                   && ((oper->addend == 0xffff8 && opcode.size == RL78_Word)
+                       || (oper->addend == 0x0fff8 && do_es && opcode.size == RL78_Word)))
+                 ;
+               else
+                 PC ('!');
+             }
 
            if (do_cond)
              {
@@ -265,6 +275,8 @@ print_insn_rl78_common (bfd_vma addr, disassemble_info * dis, RL78_Dis_Isa isa)
                      PR (PS, "psw");
                    else if (oper->addend == 0xffff8 && do_sfr && opcode.size == RL78_Word)
                      PR (PS, "sp");
+                   else if (oper->addend == 0x0fff8 && do_sfr && do_es && opcode.size == RL78_Word)
+                     PR (PS, "sp");
                     else if (oper->addend == 0xffff8 && do_sfr && opcode.size == RL78_Byte)
                       PR (PS, "spl");
                     else if (oper->addend == 0xffff9 && do_sfr && opcode.size == RL78_Byte)