return \"and %1,%0\";
return \"and %2,%0\";
}"
- [(set_attr "cc" "none_0hit,set_zn,set_zn")])
+ [(set (attr "cc")
+ (cond
+ [
+ (eq (symbol_ref "which_alternative") (const_int 0)
+ ) (const_string "none_0hit")
+ (ne (symbol_ref "GET_CODE (operands[2]) == CONST_INT
+ && (INTVAL (operands[2]) == 0x7fffffff
+ || INTVAL (operands[2]) == 0x3fffffff
+ || INTVAL (operands[2]) == 0x1fffffff
+ || INTVAL (operands[2]) == 0x0fffffff
+ || INTVAL (operands[2]) == 0x0ffffffe
+ || INTVAL (operands[2]) == 0xfffffffc
+ || INTVAL (operands[2]) == 0xfffffff8
+ || INTVAL (operands[2]) == 0xfffffff0)")
+ (const_int 0)) (const_string "set_zn")
+ ] (const_string "set_znv")))])
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=dx,dx")
return \"lsr 4,%0\;asl2 %0\;asl2 %0\";
return \"and %2,%0\";
}"
- [(set_attr "cc" "none_0hit,set_zn")])
+ [(set (attr "cc")
+ (cond
+ [
+ (eq (symbol_ref "which_alternative") (const_int 0)
+ ) (const_string "none_0hit")
+ ;; Shifts don't set the V flag, but bitwise operations clear
+ ;; it (which correctly reflects the absence of overflow in a
+ ;; compare-with-zero that might follow). As for the
+ ;; 0xfffffffe case, the add may overflow, so we can't use the
+ ;; V flag.
+ (ne (symbol_ref "GET_CODE (operands[2]) == CONST_INT
+ && (INTVAL (operands[2]) == 0x7fffffff
+ || INTVAL (operands[2]) == 0x3fffffff
+ || INTVAL (operands[2]) == 0x1fffffff
+ || INTVAL (operands[2]) == 0x0fffffff
+ || INTVAL (operands[2]) == 0x0ffffffe
+ || INTVAL (operands[2]) == 0xfffffffc
+ || INTVAL (operands[2]) == 0xfffffff8
+ || INTVAL (operands[2]) == 0xfffffff0)")
+ (const_int 0)) (const_string "set_zn")
+ ] (const_string "set_znv")))])
;; ----------------------------------------------------------------------
;; OR INSTRUCTIONS
return \"or %1,%0\";
return \"or %2,%0\";
}"
- [(set_attr "cc" "set_zn")])
+ [(set_attr "cc" "set_znv")])
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=dx")
(match_operand:SI 2 "nonmemory_operand" "dxi")))]
""
"or %2,%0"
- [(set_attr "cc" "set_zn")])
+ [(set_attr "cc" "set_znv")])
;; ----------------------------------------------------------------------
;; XOR INSTRUCTIONS
return \"xor %1,%0\";
return \"xor %2,%0\";
}"
- [(set_attr "cc" "set_zn")])
+ [(set_attr "cc" "set_znv")])
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=dx")
(match_operand:SI 2 "nonmemory_operand" "dxi")))]
""
"xor %2,%0"
- [(set_attr "cc" "set_zn")])
+ [(set_attr "cc" "set_znv")])
;; ----------------------------------------------------------------------
;; NOT INSTRUCTIONS
(not:SI (match_operand:SI 1 "register_operand" "0,0")))]
"TARGET_AM33"
"not %0"
- [(set_attr "cc" "set_zn")])
+ [(set_attr "cc" "set_znv")])
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=dx")
(not:SI (match_operand:SI 1 "register_operand" "0")))]
""
"not %0"
- [(set_attr "cc" "set_zn")])
+ [(set_attr "cc" "set_znv")])
\f
;; -----------------------------------------------------------------
;; BIT FIELDS
"@
bclr %N1,%A0
and %1,%0"
- [(set_attr "cc" "clobber,set_zn")])
+ [(set_attr "cc" "clobber,set_znv")])
(define_insn ""
[(set (match_operand:QI 0 "memory_operand" "=R,T")
"@
bset %U1,%A0
or %1,%0"
- [(set_attr "cc" "clobber,set_zn")])
+ [(set_attr "cc" "clobber,set_znv")])
(define_expand "iorqi3"
[(set (match_operand:QI 0 "nonimmediate_operand" "")
bset %U2,%A0
bset %2,%0
or %2,%0"
- [(set_attr "cc" "clobber,clobber,set_zn")])
+ [(set_attr "cc" "clobber,clobber,set_znv")])
(define_insn ""
[(set (match_operand:QI 0 "nonimmediate_operand" "=R,T,d")
bset %U2,%A0
bset %2,%0
or %2,%0"
- [(set_attr "cc" "clobber,clobber,set_zn")])
+ [(set_attr "cc" "clobber,clobber,set_znv")])
(define_insn ""
[(set (cc0)