drm: mali-dp: Check for sufficient address space

If the device-tree 'reg' node doesn't reserve enough
space for the DP, fail to bind.

Reviewed-by: Brian Starkey <brian.starkey@arm.com>
Signed-off-by: Mihail Atanassov <mihail.atanassov@arm.com>
[renamed added function to malidp_has_sufficient_address_space]
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>

diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malidp_drv.c
index 6e59b3e..99fb0ab 100644 (file)
--- a/drivers/gpu/drm/arm/malidp_drv.c
+++ b/drivers/gpu/drm/arm/malidp_drv.c
@@ -295,6 +295,20 @@ static bool malidp_is_compatible_hw_id(struct malidp_hw_device *hwdev,
        return true;
 }
 
+static bool malidp_has_sufficient_address_space(const struct resource *res,
+                                               const struct of_device_id *dev_id)
+{
+       resource_size_t res_size = resource_size(res);
+       const char *compatstr_dp500 = "arm,mali-dp500";
+
+       if (!strnstr(dev_id->compatible, compatstr_dp500,
+                    sizeof(dev_id->compatible)))
+               return res_size >= MALIDP550_ADDR_SPACE_SIZE;
+       else if (res_size < MALIDP500_ADDR_SPACE_SIZE)
+               return false;
+       return true;
+}
+
 #define MAX_OUTPUT_CHANNELS    3
 
 static int malidp_bind(struct device *dev)
@@ -374,6 +388,12 @@ static int malidp_bind(struct device *dev)
                goto query_hw_fail;
        }
 
+       if (!malidp_has_sufficient_address_space(res, dev_id)) {
+               DRM_ERROR("Insufficient address space in device-tree.\n");
+               ret = -EINVAL;
+               goto query_hw_fail;
+       }
+
        if (!malidp_is_compatible_hw_id(hwdev, dev_id)) {
                ret = -EINVAL;
                goto query_hw_fail;

diff --git a/drivers/gpu/drm/arm/malidp_regs.h b/drivers/gpu/drm/arm/malidp_regs.h
index 7a89997..e0651d2 100644 (file)
--- a/drivers/gpu/drm/arm/malidp_regs.h
+++ b/drivers/gpu/drm/arm/malidp_regs.h
@@ -95,6 +95,7 @@
 #define MALIDP_PRODUCT_ID(__core_id) ((u32)(__core_id) >> 16)
 
 /* register offsets and bits specific to DP500 */
+#define MALIDP500_ADDR_SPACE_SIZE      0x01000
 #define MALIDP500_DC_BASE              0x00000
 #define MALIDP500_DC_CONTROL           0x0000c
 #define   MALIDP500_DC_CONFIG_REQ      (1 << 17)
@@ -127,6 +128,7 @@
 #define MALIDP500_CONFIG_ID            0x00fd4
 
 /* register offsets and bits specific to DP550/DP650 */
+#define MALIDP550_ADDR_SPACE_SIZE      0x10000
 #define MALIDP550_DE_CONTROL           0x00010
 #define MALIDP550_DE_LINE_COUNTER      0x00014
 #define MALIDP550_DE_AXI_CONTROL       0x00018