MD->setHwStage(CC, ".trap_present",
(bool)CurrentProgramInfo.TrapHandlerEnable);
- // Compute registers
- // If the front-end has set tgid_x/y/z_en - assert that the
- // CurrentProgramInfo is consistent (usually set with function attributes
- // amdgpu-no-workgroup-id-x etc.).
- assert(MD->checkComputeRegisters(".tgid_x_en",
- (bool)CurrentProgramInfo.TGIdXEnable));
- assert(MD->checkComputeRegisters(".tgid_y_en",
- (bool)CurrentProgramInfo.TGIdYEnable));
- assert(MD->checkComputeRegisters(".tgid_z_en",
- (bool)CurrentProgramInfo.TGIdZEnable));
-
// EXCPEnMSB?
const unsigned LdsDwGranularity = 128;
MD->setHwStage(CC, ".lds_size",
; Function Attrs: nocallback nofree nosync nounwind willreturn memory(write)
declare void @llvm.amdgcn.raw.buffer.store.i32(i32, <4 x i32>, i32, i32, i32 immarg) #3
-attributes #0 = { nounwind memory(readwrite) "amdgpu-flat-work-group-size"="1024,1024" "amdgpu-memory-bound"="false" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-unroll-threshold"="700" "amdgpu-wave-limiter"="false" "amdgpu-work-group-info-arg-no"="4" "denormal-fp-math-f32"="preserve-sign" "target-features"=",+wavefrontsize64,+cumode" }
+attributes #0 = { nounwind memory(readwrite) "amdgpu-flat-work-group-size"="1024,1024" "amdgpu-memory-bound"="false" "amdgpu-unroll-threshold"="700" "amdgpu-wave-limiter"="false" "amdgpu-work-group-info-arg-no"="4" "denormal-fp-math-f32"="preserve-sign" "target-features"=",+wavefrontsize64,+cumode" }
attributes #1 = { nounwind memory(readwrite) "InitialPSInputAddr"="36983" }