drm/amd/display: Remove unused local variables

Remove local variables that were just set but were never used. This
decrease the number of -Wunused-but-set-variable warnings.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Arthur Grillo <arthurgrillo@riseup.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
index c4287147b8537ff5f05ad4304cd30f018bc67a98..ee08b545aaeaf353749fad791ef86ba0696faee9 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c
@@ -1219,7 +1219,6 @@ void dcn10_link_encoder_update_mst_stream_allocation_table(
        const struct link_mst_stream_allocation_table *table)
 {
        struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
-       uint32_t value0 = 0;
        uint32_t value1 = 0;
        uint32_t value2 = 0;
        uint32_t slots = 0;
@@ -1321,7 +1320,7 @@ void dcn10_link_encoder_update_mst_stream_allocation_table(
        do {
                udelay(10);
 
-               value0 = REG_READ(DP_MSE_SAT_UPDATE);
+               REG_READ(DP_MSE_SAT_UPDATE);
 
                REG_GET(DP_MSE_SAT_UPDATE,
                                DP_MSE_SAT_UPDATE, &value1);

diff --git a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.c b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.c
index f50ab961bc174b5bb08dc08b5e82d069d33010ba..a7268027a472af981da4109b58c09732d12bd3a7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.c
@@ -185,13 +185,6 @@ static bool dpp201_get_optimal_number_of_taps(
                struct scaler_data *scl_data,
                const struct scaling_taps *in_taps)
 {
-       uint32_t pixel_width;
-
-       if (scl_data->viewport.width > scl_data->recout.width)
-               pixel_width = scl_data->recout.width;
-       else
-               pixel_width = scl_data->viewport.width;
-
        if (scl_data->viewport.width  != scl_data->h_active &&
                scl_data->viewport.height != scl_data->v_active &&
                dpp->caps->dscl_data_proc_format == DSCL_DATA_PRCESSING_FIXED_FORMAT &&

diff --git a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hwseq.c
index 61bcfa03c4e7c5f6e070586f9c7165232960b8b8..1aeb04fbd89d322fa0ba48fe67788f2709c0d8b3 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hwseq.c
@@ -541,8 +541,6 @@ void dcn201_pipe_control_lock(
        bool lock)
 {
        struct dce_hwseq *hws = dc->hwseq;
-       struct hubp *hubp = NULL;
-       hubp = dc->res_pool->hubps[pipe->pipe_idx];
        /* use TG master update lock to lock everything on the TG
         * therefore only top pipe need to lock
         */

diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c
index 95528e5ef89e140f35da05771ed2155cb26adc8c..55e388c4c98bc61b1b67f27444857d3f5e821b7e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c
@@ -123,7 +123,6 @@ void afmt3_se_audio_setup(
 {
        struct dcn30_afmt *afmt3 = DCN30_AFMT_FROM_AFMT(afmt);
 
-       uint32_t speakers = 0;
        uint32_t channels = 0;
 
        ASSERT(audio_info);
@@ -131,7 +130,6 @@ void afmt3_se_audio_setup(
        if (audio_info == NULL)
                return;
 
-       speakers = audio_info->flags.info.ALLSPEAKERS;
        channels = speakers_to_channels(audio_info->flags.speaker_flags).all;
 
        /* setup the audio stream source select (audio -> dig mapping) */

diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c
index dc3e8df706b347a435c77165271c30c5119d101c..e46bbe7ddcc910d5b8f562bce1669667b8a2b75a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c
@@ -47,13 +47,9 @@ void hubp3_set_vm_system_aperture_settings(struct hubp *hubp,
 {
        struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
 
-       PHYSICAL_ADDRESS_LOC mc_vm_apt_default;
        PHYSICAL_ADDRESS_LOC mc_vm_apt_low;
        PHYSICAL_ADDRESS_LOC mc_vm_apt_high;
 
-       // The format of default addr is 48:12 of the 48 bit addr
-       mc_vm_apt_default.quad_part = apt->sys_default.quad_part >> 12;
-
        // The format of high/low are 48:18 of the 48 bit addr
        mc_vm_apt_low.quad_part = apt->sys_low.quad_part >> 18;
        mc_vm_apt_high.quad_part = apt->sys_high.quad_part >> 18;

diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
index df787fcf8e86e06e17646d09f26cdb938d51a318..9a9aac713f881204d43d87a93bc31ac565bd7016 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
@@ -323,13 +323,10 @@ void dcn30_enable_writeback(
 {
        struct dwbc *dwb;
        struct mcif_wb *mcif_wb;
-       struct timing_generator *optc;
 
        dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst];
        mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst];
 
-       /* set the OPTC source mux */
-       optc = dc->res_pool->timing_generators[dwb->otg_inst];
        DC_LOG_DWB("%s dwb_pipe_inst = %d, mpcc_inst = %d",\
                __func__, wb_info->dwb_pipe_inst,\
                wb_info->mpcc_inst);

diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
index 74e50c09bb62f9156a8436d4b86025e5b9b5b8a9..e997bb98b43db3d9d51637807f646fd8e127835f 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
@@ -1611,7 +1611,6 @@ bool dcn32_acquire_post_bldn_3dlut(
                struct dc_transfer_func **shaper)
 {
        bool ret = false;
-       union dc_3dlut_state *state;
 
        ASSERT(*lut == NULL && *shaper == NULL);
        *lut = NULL;
@@ -1620,7 +1619,6 @@ bool dcn32_acquire_post_bldn_3dlut(
        if (!res_ctx->is_mpc_3dlut_acquired[mpcc_id]) {
                *lut = pool->mpc_lut[mpcc_id];
                *shaper = pool->mpc_shaper[mpcc_id];
-               state = &pool->mpc_lut[mpcc_id]->state;
                res_ctx->is_mpc_3dlut_acquired[mpcc_id] = true;
                ret = true;
        }
@@ -1913,7 +1911,6 @@ int dcn32_populate_dml_pipes_from_context(
        struct resource_context *res_ctx = &context->res_ctx;
        struct pipe_ctx *pipe;
        bool subvp_in_use = false;
-       uint8_t is_pipe_split_expected[MAX_PIPES] = {0};
        struct dc_crtc_timing *timing;
 
        dcn20_populate_dml_pipes_from_context(dc, context, pipes, fast_validate);
@@ -2002,7 +1999,7 @@ int dcn32_populate_dml_pipes_from_context(
                }
 
                DC_FP_START();
-               is_pipe_split_expected[i] = dcn32_predict_pipe_split(context, &pipes[pipe_cnt]);
+               dcn32_predict_pipe_split(context, &pipes[pipe_cnt]);
                DC_FP_END();
 
                pipe_cnt++;

diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c
index 3a2d7bcc4b6d6cb62a7238a7438ee7ed9cc7d009..a616cf078cf48e8f84522b7d2f8464f5fb4c9c06 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c
@@ -59,25 +59,21 @@ uint32_t dcn32_helper_calculate_mall_bytes_for_cursor(
 {
        struct hubp *hubp = pipe_ctx->plane_res.hubp;
        uint32_t cursor_size = hubp->curs_attr.pitch * hubp->curs_attr.height;
-       uint32_t cursor_bpp = 4;
        uint32_t cursor_mall_size_bytes = 0;
 
        switch (pipe_ctx->stream->cursor_attributes.color_format) {
        case CURSOR_MODE_MONO:
                cursor_size /= 2;
-               cursor_bpp = 4;
                break;
        case CURSOR_MODE_COLOR_1BIT_AND:
        case CURSOR_MODE_COLOR_PRE_MULTIPLIED_ALPHA:
        case CURSOR_MODE_COLOR_UN_PRE_MULTIPLIED_ALPHA:
                cursor_size *= 4;
-               cursor_bpp = 4;
                break;
 
        case CURSOR_MODE_COLOR_64BIT_FP_PRE_MULTIPLIED:
        case CURSOR_MODE_COLOR_64BIT_FP_UN_PRE_MULTIPLIED:
                cursor_size *= 8;
-               cursor_bpp = 8;
                break;
        }
 

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
index 35d10b4d018bf0507a59cb0089125eed5e0b272b..2244e4fb8c96da195ce1c1b1d3771c13de5dc576 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
@@ -902,7 +902,6 @@ static void dml_rq_dlg_get_dlg_params(
        double hratio_c;
        double vratio_l;
        double vratio_c;
-       bool scl_enable;
 
        unsigned int swath_width_ub_l;
        unsigned int dpte_groups_per_row_ub_l;
@@ -1020,7 +1019,6 @@ static void dml_rq_dlg_get_dlg_params(
        hratio_c = scl->hscl_ratio_c;
        vratio_l = scl->vscl_ratio;
        vratio_c = scl->vscl_ratio_c;
-       scl_enable = scl->scl_enable;
 
        swath_width_ub_l = rq_dlg_param->rq_l.swath_width_ub;
        dpte_groups_per_row_ub_l = rq_dlg_param->rq_l.dpte_groups_per_row_ub;