bool X86AsmParser::IsSIReg(unsigned Reg) {
switch (Reg) {
- default:
- llvm_unreachable("Only (R|E)SI and (R|E)DI are expected!");
- return false;
+ default: llvm_unreachable("Only (R|E)SI and (R|E)DI are expected!");
case X86::RSI:
case X86::ESI:
case X86::SI:
unsigned X86AsmParser::GetSIDIForRegClass(unsigned RegClassID, unsigned Reg,
bool IsSIReg) {
switch (RegClassID) {
- default:
- llvm_unreachable("Unexpected register class");
- return Reg;
+ default: llvm_unreachable("Unexpected register class");
case X86::GR64RegClassID:
return IsSIReg ? X86::RSI : X86::RDI;
case X86::GR32RegClassID: