[ARM] Add command line option for RAS extension.

This patch adds the architecture extension "+ras" to enable RAS
support. It is enabled by default for -march=armv8.2-a and available but
disabled by default for armv8-a and armv8.1-a.

gas/
	* config/tc-arm.c (arm_ext_v8_2): Rename to arm_ext_ras.
	(arm_ext_ras): Renamed from arm_ext_v8_2.
	(insns): Update for arm_ext_v8_2 renaming.
	(arm_extensions): Add "ras".
	* doc/c-arm.texi (ARM Options): Add an entry for "ras".
	* testsuite/gas/arm/armv8-a+ras.d: New.
	* testsuite/gas/arm/armv8_2-a.d: Add explicit command line
	options.

include/
	* opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
	entries.
	(ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.

opcodes/
	* arm-dis.c (arm_opcodes): Replace ARM_EXT_V8_2A with
	ARM_EXT_RAS in relevant entries.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index ec30637..d41cd6d 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,14 @@
+2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * config/tc-arm.c (arm_ext_v8_2): Rename to arm_ext_ras.
+       (arm_ext_ras): Renamed from arm_ext_v8_2.
+       (insns): Update for arm_ext_v8_2 renaming.
+       (arm_extensions): Add "ras".
+       * doc/c-arm.texi (ARM Options): Add an entry for "ras".
+       * testsuite/gas/arm/armv8-a+ras.d: New.
+       * testsuite/gas/arm/armv8_2-a.d: Add explicit command line
+       options.
+
 2016-06-05  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 
        * itbl-parse.y (yyerror): Use modern argument declaration style.

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index d1114a1..5005343 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -223,8 +223,8 @@ static const arm_feature_set arm_ext_atomics =
 /* DSP instructions Tag_DSP_extension refers to.  */
 static const arm_feature_set arm_ext_dsp =
   ARM_FEATURE_CORE_LOW (ARM_EXT_V5E | ARM_EXT_V5ExP | ARM_EXT_V6_DSP);
-static const arm_feature_set arm_ext_v8_2 =
-  ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_2A);
+static const arm_feature_set arm_ext_ras =
+  ARM_FEATURE_CORE_HIGH (ARM_EXT2_RAS);
 /* FP16 instructions.  */
 static const arm_feature_set arm_ext_fp16 =
   ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST);
@@ -19713,9 +19713,9 @@ static const struct asm_opcode insns[] =
 
  /* ARMv8.2 RAS extension.  */
 #undef  ARM_VARIANT
-#define ARM_VARIANT   & arm_ext_v8_2
+#define ARM_VARIANT   & arm_ext_ras
 #undef  THUMB_VARIANT
-#define THUMB_VARIANT & arm_ext_v8_2
+#define THUMB_VARIANT & arm_ext_ras
  TUE ("esb", 320f010, f3af8010, 0, (), noargs,  noargs),
 
 #undef  ARM_VARIANT
@@ -25508,6 +25508,9 @@ static const struct arm_option_extension_value_table arm_extensions[] =
   ARM_EXT_OPT ("pan",  ARM_FEATURE_CORE_HIGH (ARM_EXT2_PAN),
                        ARM_FEATURE (ARM_EXT_V8, ARM_EXT2_PAN, 0),
                        ARM_FEATURE_CORE_LOW (ARM_EXT_V8)),
+  ARM_EXT_OPT ("ras",  ARM_FEATURE_CORE_HIGH (ARM_EXT2_RAS),
+                       ARM_FEATURE (ARM_EXT_V8, ARM_EXT2_RAS, 0),
+                       ARM_FEATURE_CORE_LOW (ARM_EXT_V8)),
   ARM_EXT_OPT ("rdma",  FPU_ARCH_NEON_VFP_ARMV8_1,
                        ARM_FEATURE_COPROC (FPU_NEON_ARMV8 | FPU_NEON_EXT_RDMA),
                        ARM_FEATURE_CORE_LOW (ARM_EXT_V8)),

diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi
index 7ca38d0..0cf7390 100644 (file)
--- a/gas/doc/c-arm.texi
+++ b/gas/doc/c-arm.texi
@@ -186,6 +186,8 @@ architectures),
 @code{virt} (Virtualization Extensions for v7-A architecture, implies
 @code{idiv}),
 @code{pan} (Priviliged Access Never Extensions for v8-A architecture),
+@code{ras} (Reliability, Availability and Serviceability extensions
+for v8-A architecture),
 @code{rdma} (ARMv8.1 Advanced SIMD extensions for v8-A architecture, implies
 @code{simd})
 and

diff --git a/gas/testsuite/gas/arm/armv8-a+ras.d b/gas/testsuite/gas/arm/armv8-a+ras.d
new file mode 100644 (file)
index 0000000..b6a4e45
--- /dev/null
+++ b/gas/testsuite/gas/arm/armv8-a+ras.d
@@ -0,0 +1,55 @@
+#name: ARMv8-A RAS
+#as: -march=armv8-a+ras
+#source: armv8_2-a.s
+#objdump: -dr
+#skip: *-*-pe *-wince-* *-*-coff
+
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+
+[0-9a-f]+ <.*>:
+   [0-9a-f]+:  e320f010        esb
+
+[0-9a-f]+ <.*>:
+   [0-9a-f]+:  f3af 8010       esb
+
+[0-9a-f]+ <.*>:
+   [0-9a-f]+:  ee100f11        mrc     15, 0, r0, cr0, cr1, \{0\}
+   [0-9a-f]+:  ee100fd2        mrc     15, 0, r0, cr0, cr2, \{6\}
+  [0-9a-f]+:   ee150f13        mrc     15, 0, r0, cr5, cr3, \{0\}
+  [0-9a-f]+:   ee150f33        mrc     15, 0, r0, cr5, cr3, \{1\}
+  [0-9a-f]+:   ee051f33        mcr     15, 0, r1, cr5, cr3, \{1\}
+  [0-9a-f]+:   ee150f14        mrc     15, 0, r0, cr5, cr4, \{0\}
+  [0-9a-f]+:   ee150f34        mrc     15, 0, r0, cr5, cr4, \{1\}
+  [0-9a-f]+:   ee051f34        mcr     15, 0, r1, cr5, cr4, \{1\}
+  [0-9a-f]+:   ee150f54        mrc     15, 0, r0, cr5, cr4, \{2\}
+  [0-9a-f]+:   ee051f54        mcr     15, 0, r1, cr5, cr4, \{2\}
+  [0-9a-f]+:   ee150f74        mrc     15, 0, r0, cr5, cr4, \{3\}
+  [0-9a-f]+:   ee051f74        mcr     15, 0, r1, cr5, cr4, \{3\}
+  [0-9a-f]+:   ee150f94        mrc     15, 0, r0, cr5, cr4, \{4\}
+  [0-9a-f]+:   ee150fb4        mrc     15, 0, r0, cr5, cr4, \{5\}
+  [0-9a-f]+:   ee051fb4        mcr     15, 0, r1, cr5, cr4, \{5\}
+  [0-9a-f]+:   ee150ff4        mrc     15, 0, r0, cr5, cr4, \{7\}
+  [0-9a-f]+:   ee051ff4        mcr     15, 0, r1, cr5, cr4, \{7\}
+  [0-9a-f]+:   ee150f15        mrc     15, 0, r0, cr5, cr5, \{0\}
+  [0-9a-f]+:   ee051f15        mcr     15, 0, r1, cr5, cr5, \{0\}
+  [0-9a-f]+:   ee150f35        mrc     15, 0, r0, cr5, cr5, \{1\}
+  [0-9a-f]+:   ee051f35        mcr     15, 0, r1, cr5, cr5, \{1\}
+  [0-9a-f]+:   ee150f95        mrc     15, 0, r0, cr5, cr5, \{4\}
+  [0-9a-f]+:   ee051f95        mcr     15, 0, r1, cr5, cr5, \{4\}
+  [0-9a-f]+:   ee150fb5        mrc     15, 0, r0, cr5, cr5, \{5\}
+  [0-9a-f]+:   ee051fb5        mcr     15, 0, r1, cr5, cr5, \{5\}
+  [0-9a-f]+:   ee1c0f31        mrc     15, 0, r0, cr12, cr1, \{1\}
+  [0-9a-f]+:   ee0c1f31        mcr     15, 0, r1, cr12, cr1, \{1\}
+  [0-9a-f]+:   ee910f91        mrc     15, 4, r0, cr1, cr1, \{4\}
+  [0-9a-f]+:   ee811f91        mcr     15, 4, r1, cr1, cr1, \{4\}
+  [0-9a-f]+:   ee950f72        mrc     15, 4, r0, cr5, cr2, \{3\}
+  [0-9a-f]+:   ee851f72        mcr     15, 4, r1, cr5, cr2, \{3\}
+  [0-9a-f]+:   ee910f31        mrc     15, 4, r0, cr1, cr1, \{1\}
+  [0-9a-f]+:   ee811f31        mcr     15, 4, r1, cr1, cr1, \{1\}
+  [0-9a-f]+:   ee9c0f31        mrc     15, 4, r0, cr12, cr1, \{1\}
+  [0-9a-f]+:   ee8c1f31        mcr     15, 4, r1, cr12, cr1, \{1\}
+  [0-9a-f]+:   eed10f11        mrc     15, 6, r0, cr1, cr1, \{0\}
+  [0-9a-f]+:   eec11f11        mcr     15, 6, r1, cr1, cr1, \{0\}

diff --git a/gas/testsuite/gas/arm/armv8_2-a.d b/gas/testsuite/gas/arm/armv8_2-a.d
index bf8c011..a971711 100644 (file)
--- a/gas/testsuite/gas/arm/armv8_2-a.d
+++ b/gas/testsuite/gas/arm/armv8_2-a.d
@@ -1,4 +1,5 @@
 #name: ARMv8.2-A
+#as: -march=armv8.2-a
 #objdump: -dr
 #skip: *-*-pe *-wince-* *-*-coff
 

diff --git a/include/ChangeLog b/include/ChangeLog
index 607eba0..abf5a52 100644 (file)
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,9 @@
+2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
+       entries.
+       (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
+
 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 
        * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.

diff --git a/include/opcode/arm.h b/include/opcode/arm.h
index c8883db..24a66b8 100644 (file)
--- a/include/opcode/arm.h
+++ b/include/opcode/arm.h
@@ -60,9 +60,10 @@
 #define ARM_EXT2_V8_2A  0x00000002     /* ARM V8.2A.  */
 #define ARM_EXT2_V8M    0x00000004     /* ARM V8M.  */
 #define ARM_EXT2_ATOMICS 0x00000008    /* ARMv8 atomics.  */
-#define ARM_EXT2_V6T2_V8M 0x00000010   /* V8M Baseline from V6T2.  */
+#define ARM_EXT2_V6T2_V8M  0x00000010  /* V8M Baseline from V6T2.  */
 #define ARM_EXT2_FP16_INST 0x00000020  /* ARM V8.2A FP16 instructions.  */
-#define ARM_EXT2_V8M_MAIN 0x00000040   /* ARMv8-M Mainline.  */
+#define ARM_EXT2_V8M_MAIN  0x00000040  /* ARMv8-M Mainline.  */
+#define ARM_EXT2_RAS    0x00000080     /* RAS extension.  */
 
 /* Co-processor space extensions.  */
 #define ARM_CEXT_XSCALE   0x00000001   /* Allow MIA etc.          */
@@ -147,7 +148,7 @@
    | ARM_EXT_VIRT | ARM_EXT_V8)
 #define ARM_AEXT2_V8A  (ARM_EXT2_V6T2_V8M | ARM_EXT2_ATOMICS)
 #define ARM_AEXT2_V8_1A        (ARM_AEXT2_V8A | ARM_EXT2_PAN)
-#define ARM_AEXT2_V8_2A        (ARM_AEXT2_V8_1A | ARM_EXT2_V8_2A)
+#define ARM_AEXT2_V8_2A        (ARM_AEXT2_V8_1A | ARM_EXT2_V8_2A | ARM_EXT2_RAS)
 #define ARM_AEXT_V8M_BASE (ARM_AEXT_V6SM | ARM_EXT_DIV)
 #define ARM_AEXT_V8M_MAIN ARM_AEXT_V7M
 #define ARM_AEXT2_V8M  (ARM_EXT2_V8M | ARM_EXT2_ATOMICS | ARM_EXT2_V6T2_V8M)

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 4ebd592..04757f6 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * arm-dis.c (arm_opcodes): Replace ARM_EXT_V8_2A with
+       ARM_EXT_RAS in relevant entries.
+
 2016-06-03  Peter Bergner <bergner@vnet.ibm.com>
 
        PR binutils/20196

diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 6889815..40136e5 100644 (file)
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -1727,7 +1727,7 @@ static const struct opcode32 arm_opcodes[] =
     "%22?sumlal%20's%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
 
   /* V8.2 RAS extension instructions.  */
-  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_2A),
+  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_RAS),
     0xe320f010, 0xffffffff, "esb"},
 
   /* V8 instructions.  */
@@ -2696,7 +2696,7 @@ static const struct opcode32 thumb32_opcodes[] =
     0xe840f0c0, 0xfff0f0ff, "ttat\t%8-11r, %16-19r"},
 
   /* ARM V8.2 RAS extension instructions.  */
-  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_2A),
+  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_RAS),
     0xf3af8010, 0xffffffff, "esb"},
 
   /* V8 instructions.  */