spi: cadence-quadspi: Fix PM disable depth imbalance in cqspi_probe
authorZhang Qilong <zhangqilong3@huawei.com>
Sat, 24 Sep 2022 12:13:07 +0000 (20:13 +0800)
committerMark Brown <broonie@kernel.org>
Mon, 26 Sep 2022 15:10:35 +0000 (16:10 +0100)
The pm_runtime_enable will increase power disable depth. Thus
a pairing decrement is needed on the error handling path to
keep it balanced according to context.

Fixes:73d5fe0462702 ("spi: cadence-quadspi: Remove spi_master_put() in probe failure path")

Signed-off-by: Zhang Qilong <zhangqilong3@huawei.com>
Link: https://lore.kernel.org/r/20220924121310.78331-2-zhangqilong3@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-cadence-quadspi.c

index 72b1a5a..106c09f 100644 (file)
@@ -1619,7 +1619,7 @@ static int cqspi_probe(struct platform_device *pdev)
        pm_runtime_enable(dev);
        ret = pm_runtime_resume_and_get(dev);
        if (ret < 0)
-               return ret;
+               goto probe_pm_failed;
 
        ret = clk_prepare_enable(cqspi->clk);
        if (ret) {
@@ -1712,6 +1712,7 @@ probe_reset_failed:
        clk_disable_unprepare(cqspi->clk);
 probe_clk_failed:
        pm_runtime_put_sync(dev);
+probe_pm_failed:
        pm_runtime_disable(dev);
        return ret;
 }