chipset updates
authorBen Widawsky <ben@bwidawsk.net>
Wed, 25 Apr 2012 20:33:17 +0000 (13:33 -0700)
committerBen Widawsky <ben@bwidawsk.net>
Wed, 25 Apr 2012 20:33:17 +0000 (13:33 -0700)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
lib/intel_chipset.h

index 668bf59..bfb1923 100755 (executable)
 #define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS        0x0126
 #define PCI_CHIP_SANDYBRIDGE_S         0x010A /* server */
 
-#define PCI_CHIP_IVYBRIDGE_GT1 0x0152 /* desktop */
-#define PCI_CHIP_IVYBRIDGE_GT2 0x0162
+#define PCI_CHIP_IVYBRIDGE_GT1         0x0152 /* desktop */
+#define PCI_CHIP_IVYBRIDGE_GT2         0x0162
 #define PCI_CHIP_IVYBRIDGE_M_GT1       0x0156 /* mobile */
 #define PCI_CHIP_IVYBRIDGE_M_GT2       0x0166
 #define PCI_CHIP_IVYBRIDGE_S           0x015a /* server */
+#define PCI_CHIP_IVYBRIDGE_S_GT2       0x016a /* server */
+
+#define PCI_CHIP_HASWELL_GT1            0x0402 /* Desktop */
+#define PCI_CHIP_HASWELL_GT2            0x0412
+#define PCI_CHIP_HASWELL_M_GT1          0x0406 /* Mobile */
+#define PCI_CHIP_HASWELL_M_GT2          0x0416
+#define PCI_CHIP_HASWELL_M_ULT_GT2      0x0A16 /* Mobile ULT */
 
 #define IS_MOBILE(devid)       (devid == PCI_CHIP_I855_GM || \
                                 devid == PCI_CHIP_I915_GM || \
                                 devid == PCI_CHIP_IVYBRIDGE_M_GT2 || \
                                 devid == PCI_CHIP_IVYBRIDGE_S)
 
+#define IS_GEN7(devid)          (IS_IVYBRIDGE(devid) || \
+                                 IS_HASWELL(devid))
+
+#define IS_IVYBRIDGE(dev)      (dev == PCI_CHIP_IVYBRIDGE_GT1 || \
+                                dev == PCI_CHIP_IVYBRIDGE_GT2 || \
+                                dev == PCI_CHIP_IVYBRIDGE_M_GT1 || \
+                                dev == PCI_CHIP_IVYBRIDGE_M_GT2 || \
+                                dev == PCI_CHIP_IVYBRIDGE_S || \
+                                dev == PCI_CHIP_IVYBRIDGE_S_GT2)
+
+#define IS_HSW_GT1(devid)       (devid == PCI_CHIP_HASWELL_GT1 || \
+                                 devid == PCI_CHIP_HASWELL_M_GT1)
+#define IS_HSW_GT2(devid)       (devid == PCI_CHIP_HASWELL_GT2 || \
+                                 devid == PCI_CHIP_HASWELL_M_GT2 || \
+                                 devid == PCI_CHIP_HASWELL_M_ULT_GT2)
+
+#define IS_HASWELL(devid)       (IS_HSW_GT1(devid) || \
+                                 IS_HSW_GT2(devid))
 
 #define IS_965(devid)          (IS_GEN4(devid) || \
                                 IS_GEN5(devid) || \