include: define CONFIG_SPL and CONFIG_TPL as 1
authorMasahiro Yamada <yamada.m@jp.panasonic.com>
Wed, 30 Jul 2014 05:08:16 +0000 (14:08 +0900)
committerTom Rini <trini@ti.com>
Wed, 30 Jul 2014 12:48:02 +0000 (08:48 -0400)
We are about to switch to Kconfig in the next commit.
But there are something to get done beforehand.

In Kconfig, include/generated/autoconf.h defines boolean
CONFIG macros as 1.

CONFIG_SPL and CONFIG_TPL, if defined, must be set to 1.
Otherwise, when switching to Kconfig, the build log
would be sprinkled with warning messages like this:
  warning: "CONFIG_SPL" redefined [enabled by default]

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
56 files changed:
doc/README.SPL
include/configs/B4860QDS.h
include/configs/BSC9131RDB.h
include/configs/BSC9132QDS.h
include/configs/C29XPCIE.h
include/configs/MPC8313ERDB.h
include/configs/P1010RDB.h
include/configs/P1022DS.h
include/configs/P1_P2_RDB.h
include/configs/T104xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240QDS.h
include/configs/a3m071.h
include/configs/am335x_igep0033.h
include/configs/am3517_crane.h
include/configs/am3517_evm.h
include/configs/apf27.h
include/configs/arndale.h
include/configs/bur_am335x_common.h
include/configs/cam_enc_4xx.h
include/configs/cm_t35.h
include/configs/da850evm.h
include/configs/devkit8000.h
include/configs/exynos5-dt.h
include/configs/hawkboard.h
include/configs/ipam390.h
include/configs/lwmon5.h
include/configs/m53evk.h
include/configs/mcx.h
include/configs/microblaze-generic.h
include/configs/mx31pdk.h
include/configs/mxs.h
include/configs/omap3_evm_common.h
include/configs/origen.h
include/configs/p1_p2_rdb_pc.h
include/configs/palmtreo680.h
include/configs/pcm051.h
include/configs/sama5d3_xplained.h
include/configs/sama5d3xek.h
include/configs/siemens-am33x-common.h
include/configs/smdkv310.h
include/configs/socfpga_cyclone5.h
include/configs/sunxi-common.h
include/configs/tam3517-common.h
include/configs/tao3530.h
include/configs/tegra-common.h
include/configs/ti814x_evm.h
include/configs/ti816x_evm.h
include/configs/ti_armv7_common.h
include/configs/tricorder.h
include/configs/tx25.h
include/configs/vpac270.h
include/configs/woodburn_sd.h
include/configs/x600.h
include/configs/zynq-common.h

index 57a39a4..2b4b0b8 100644 (file)
@@ -40,7 +40,7 @@ COBJS-$(CONFIG_SPL_BUILD) += foo.o
 
 The building of SPL images can be with:
 
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 
 Because SPL images normally have a different text base, one has to be
 configured by defining CONFIG_SPL_TEXT_BASE. The linker script has to be
index 43c9df0..e6475ef 100644 (file)
@@ -23,7 +23,7 @@
 #define CONFIG_RAMBOOT_TEXT_BASE       CONFIG_SYS_TEXT_BASE
 #define CONFIG_RESET_VECTOR_ADDRESS    0xfffffffc
 #else
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
index 5a316c8..e6b46e4 100644 (file)
@@ -25,7 +25,7 @@
 #endif
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
index 49c16af..37e1688 100644 (file)
@@ -41,7 +41,7 @@
 #endif
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
index 0dd1560..f170fc7 100644 (file)
@@ -24,8 +24,8 @@
 #endif
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL
-#define CONFIG_TPL
+#define CONFIG_SPL 1
+#define CONFIG_TPL 1
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_SPL_NAND_BOOT
 #define CONFIG_SPL_FLUSH_IMAGE
index 69b2cb1..7f5aa59 100644 (file)
@@ -19,7 +19,7 @@
 #define CONFIG_MPC8313ERDB     1
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
index 50529bf..51127c8 100644 (file)
@@ -21,7 +21,7 @@
 #define CONFIG_NAND_FSL_IFC
 
 #ifdef CONFIG_SDCARD
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
@@ -56,7 +56,7 @@
 #define CONFIG_SYS_TEXT_BASE           0x11000000
 #define CONFIG_RESET_VECTOR_ADDRESS    0x1107fffc
 #else
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
@@ -88,7 +88,7 @@
 #endif
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #ifdef CONFIG_SECURE_BOOT
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0
 #define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 #else
-#define CONFIG_TPL
+#define CONFIG_TPL 1
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_SPL_NAND_BOOT
 #define CONFIG_SPL_FLUSH_IMAGE
index 959cdf6..5a38efe 100644 (file)
@@ -16,7 +16,7 @@
 #endif
 
 #ifdef CONFIG_SDCARD
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
@@ -45,7 +45,7 @@
 #endif
 
 #ifdef CONFIG_SPIFLASH
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
@@ -79,8 +79,8 @@
 #define CONFIG_SYS_NAND_MAX_OOBFREE    5
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL
-#define CONFIG_TPL
+#define CONFIG_SPL 1
+#define CONFIG_TPL 1
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_SPL_NAND_BOOT
 #define CONFIG_SPL_FLUSH_IMAGE
index 110ba5f..dd80ddc 100644 (file)
@@ -36,7 +36,7 @@
 #endif
 
 #ifdef CONFIG_SDCARD
-#define CONFIG_SPL
+#define CONFIG_SPL     1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
@@ -64,7 +64,7 @@
 #endif
 
 #ifdef CONFIG_SPIFLASH
-#define CONFIG_SPL
+#define CONFIG_SPL     1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
@@ -93,8 +93,8 @@
 #endif
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL
-#define CONFIG_TPL
+#define CONFIG_SPL     1
+#define CONFIG_TPL     1
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_SPL_NAND_BOOT
 #define CONFIG_SPL_FLUSH_IMAGE
index c96f03c..65fc8b7 100644 (file)
@@ -22,7 +22,7 @@
 #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg
 #endif
 
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
index 784310a..cffafab 100644 (file)
@@ -55,7 +55,7 @@
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_rcw.cfg
 #endif
 
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
index deeabae..55e4177 100644 (file)
@@ -44,7 +44,7 @@
 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xrdb/t2080_pbi.cfg
 #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_rcw.cfg
 
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
index efdb68b..92642d8 100644 (file)
@@ -25,7 +25,7 @@
 #define CONFIG_RAMBOOT_TEXT_BASE        CONFIG_SYS_TEXT_BASE
 #define CONFIG_RESET_VECTOR_ADDRESS     0xfffffffc
 #else
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
index 205adfd..9f85389 100644 (file)
 /*
  * SPL related defines
  */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NOR_SUPPORT
index c17327f..5023f9d 100644 (file)
 #undef CONFIG_USE_IRQ
 
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 /*
  * Place the image at the start of the ROM defined image space.
index d826214..cd8108b 100644 (file)
                                         GENERATED_GBL_DATA_SIZE)
 
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SIMPLE
index a9c5a8f..01c94ac 100644 (file)
                                         GENERATED_GBL_DATA_SIZE)
 
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SIMPLE
index b10c48c..a97f213 100644 (file)
@@ -37,7 +37,7 @@
 /*
  * SPL
  */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_TARGET      "u-boot-with-spl.bin"
 #define CONFIG_SPL_LDSCRIPT    "arch/$(ARCH)/cpu/u-boot-spl.lds"
 #define CONFIG_SPL_MAX_SIZE    2048
index 370db82..c24df44 100644 (file)
 
 /* MMC SPL */
 #define CONFIG_EXYNOS_SPL
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define COPY_BL2_FNPTR_ADDR    0x02020030
 
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
index 5a37536..6ec623e 100644 (file)
  * under common/spl/.  Given our generally common memory map, we set a
  * number of related defaults and sizes here.
  */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 /*
  * Place the image at the start of the ROM defined image space.
index d1a8ff2..759ad2a 100644 (file)
 #define CONFIG_SYS_NAND_BLOCK_SIZE     0x20000
 
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
index d8d71a9..29a8eff 100644 (file)
 #define CONFIG_OMAP3_SPI
 
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_NAND_SIMPLE
 
index b279409..9ec8cad 100644 (file)
 
 #ifndef CONFIG_DIRECT_NOR_BOOT
 /* defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SYS_SPL_MALLOC_START    (CONFIG_SYS_TEXT_BASE - \
index cc53fc9..acd2c6b 100644 (file)
 #define CONFIG_SYS_SRAM_SIZE               0x10000
 
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_NAND_SIMPLE
 
index e36a031..91ad3a3 100644 (file)
 #define CONFIG_TPM_TIS_I2C_SLAVE_ADDR  0x20
 
 /* MMC SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define COPY_BL2_FNPTR_ADDR    0x02020030
 
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
index 73e1624..8144883 100644 (file)
@@ -46,7 +46,7 @@
 #endif
 
 /* Spl */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SUPPORT
index fdd5680..6ad8822 100644 (file)
                                        "-(rootfs)"
 
 /* defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SYS_SPL_MALLOC_START    (CONFIG_SYS_TEXT_BASE - \
index 07ddfc4..22cbdaa 100644 (file)
  * SPL related defines
  */
 #ifdef CONFIG_LCD4_LWMON5
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NOR_SUPPORT
index 97196c6..3818f2f 100644 (file)
 /*
  * NAND SPL
  */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TARGET              "u-boot-with-nand-spl.imx"
 #define CONFIG_SPL_BOARD_INIT
index 75abb60..2ba1edd 100644 (file)
                                         GENERATED_GBL_DATA_SIZE)
 
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SIMPLE
index 06b7e94..cb1df6b 100644 (file)
 #endif
 
 /* SPL part */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_CMD_SPL
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
index f223788..85d438f 100644 (file)
@@ -29,7 +29,7 @@
 
 #define CONFIG_MACH_TYPE       MACH_TYPE_MX31_3DS
 
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_TARGET      "u-boot-with-spl.bin"
 #define CONFIG_SPL_LDSCRIPT    "arch/$(ARCH)/cpu/u-boot-spl.lds"
 #define CONFIG_SPL_MAX_SIZE    2048
index 8bce28f..fffcc37 100644 (file)
@@ -50,7 +50,7 @@
 #define CONFIG_ARCH_MISC_INIT
 
 /* SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
 #define CONFIG_SPL_START_S_PATH        "arch/arm/cpu/arm926ejs/mxs"
 #define CONFIG_SPL_LDSCRIPT    "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
index 739d392..9589229 100644 (file)
 #define CONFIG_SYS_CACHELINE_SIZE      64
 
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE           0x40200800
 #define CONFIG_SPL_MAX_SIZE            (54 * 1024)     /* 8 KB for stack */
index 8258338..b0c6eb1 100644 (file)
@@ -65,7 +65,7 @@
 #undef CONFIG_CMD_NFS
 
 /* MMC SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define COPY_BL2_FNPTR_ADDR    0x02020030
 #define CONFIG_SPL_TEXT_BASE   0x02021410
 
index 185df77..22f6d12 100644 (file)
 #endif
 
 #ifdef CONFIG_SDCARD
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
 #endif
 
 #ifdef CONFIG_SPIFLASH
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
 #endif
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL
-#define CONFIG_TPL
+#define CONFIG_SPL 1
+#define CONFIG_TPL 1
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_SPL_NAND_BOOT
 #define CONFIG_SPL_FLUSH_IMAGE
index 3662663..31e89d9 100644 (file)
 /*
  * SPL
  */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_TEXT_BASE    0xa1700000 /* IPL loads SPL here */
 #define CONFIG_SPL_STACK        0x5c040000 /* end of internal SRAM */
 #define CONFIG_SPL_NAND_SUPPORT /* build libnand for spl */
index 9af3efd..207a290 100644 (file)
 #define CONFIG_ENV_IS_NOWHERE
 
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
 /*
index f72ab0b..41b041b 100644 (file)
 #define CONFIG_SYS_MALLOC_LEN          (4 * 1024 * 1024)
 
 /* SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL     1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE           0x300000
 #define CONFIG_SPL_MAX_SIZE            0x10000
index da27180..fe44521 100644 (file)
 #define CONFIG_SYS_MALLOC_LEN          (1024 * 1024)
 
 /* SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE           0x300000
 #define CONFIG_SPL_MAX_SIZE            0x10000
index 53816a6..236bb0c 100644 (file)
 #define CONFIG_SYS_I2C_OMAP24XX
 
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE           0x402F0400
 #define CONFIG_SPL_MAX_SIZE            (101 * 1024)
index 34adfaf..e9f33cf 100644 (file)
@@ -76,7 +76,7 @@
 #define CONFIG_ZERO_BOOTDELAY_CHECK
 
 /* MMC SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define COPY_BL2_FNPTR_ADDR    0x00002488
 
index 262e744..5ebf9e4 100644 (file)
  */
 
 /* Enable building of SPL globally */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 
 /* TEXT_BASE for linking the SPL binary */
index 845b004..38e8826 100644 (file)
 
 #ifdef CONFIG_SPL_FEL
 
-#define CONFIG_SPL
+#define CONFIG_SPL     1
 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds"
 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi"
 #define CONFIG_SPL_TEXT_BASE           0x2000
index aa0ea16..b94a6cc 100644 (file)
 #define CONFIG_NET_RETRY_COUNT 10
 
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_CONSOLE
index 9fc31be..9d4ab21 100644 (file)
 #define CONGIG_CMD_STORAGE
 
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_NAND_SIMPLE
 
index 3b88a83..779a1d2 100644 (file)
 #define CONFIG_CMD_ENTERRCM
 
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_RAM_DEVICE
 #define CONFIG_SPL_BOARD_INIT
index b51400c..bd25ec8 100644 (file)
 #define CONFIG_ENV_IS_NOWHERE
 
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE           0x40300000
 #define CONFIG_SPL_MAX_SIZE            ((128 - 18) * 1024)
index b8c0d54..ea0c4fd 100644 (file)
 
 /* SPL */
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE    0x40400000
 #define CONFIG_SPL_MAX_SIZE     ((128 - 18) * 1024)
index 85c027c..ee69d7d 100644 (file)
  */
 #if !defined(CONFIG_NOR_BOOT) && \
        !(defined(CONFIG_QSPI_BOOT) && defined(CONFIG_AM43XX))
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_OS_BOOT
 
index 6c2f653..1d48031 100644 (file)
 #define CONFIG_SYS_SRAM_SIZE           0x10000
 
 /* Defines for SPL */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_NAND_SIMPLE
 
index 5ac6e64..d362087 100644 (file)
@@ -21,7 +21,7 @@
 
 #define        CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* 256 kB for U-Boot */
 
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
 #define CONFIG_SPL_LDSCRIPT            "arch/$(ARCH)/cpu/u-boot-spl.lds"
 #define CONFIG_SPL_MAX_SIZE            2048
index c6d4763..e53d3c4 100644 (file)
@@ -17,7 +17,7 @@
 #define        CONFIG_SYS_TEXT_BASE    0xa0000000
 
 #ifdef CONFIG_ONENAND
-#define        CONFIG_SPL
+#define        CONFIG_SPL 1
 #define        CONFIG_SPL_ONENAND_SUPPORT
 #define        CONFIG_SPL_ONENAND_LOAD_ADDR    0x2000
 #define        CONFIG_SPL_ONENAND_LOAD_SIZE    \
index 437472f..2bf5c10 100644 (file)
@@ -20,7 +20,7 @@
 /*
  * SPL
  */
-#define        CONFIG_SPL
+#define        CONFIG_SPL 1
 #define CONFIG_SPL_FRAMEWORK
 #define        CONFIG_SPL_LDSCRIPT     "arch/arm/cpu/arm1136/u-boot-spl.lds"
 #define        CONFIG_SPL_LIBCOMMON_SUPPORT
index eae85d6..e5bc6b9 100644 (file)
 /*
  * SPL related defines
  */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_SPL_TEXT_BASE   0xd2800b00
 #define        CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/spear"
 #define CONFIG_SPL_LDSCRIPT    "arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds"
index 690cacb..f6d924d 100644 (file)
 #define CONFIG_CMD_TFTPPUT
 
 /* SPL part */
-#define CONFIG_SPL
+#define CONFIG_SPL 1
 #define CONFIG_CMD_SPL
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_LIBCOMMON_SUPPORT