arm64: dts: allwinner: h6: Add support for RTC and fix the clock tree
authorOndrej Jirman <megous@megous.com>
Tue, 20 Aug 2019 15:19:34 +0000 (17:19 +0200)
committerMaxime Ripard <maxime.ripard@bootlin.com>
Fri, 23 Aug 2019 08:20:03 +0000 (10:20 +0200)
This patch adds RTC node and fixes the clock properties and nodes
to reflect the real clock tree.

The device nodes for the internal oscillator and osc32k are removed,
as these clocks are now provided by the RTC device. Clock references
are fixed accordingly, too.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi

index 67b732e..67f920e 100644 (file)
                status = "disabled";
        };
 
-       iosc: internal-osc-clk {
-               #clock-cells = <0>;
-               compatible = "fixed-clock";
-               clock-frequency = <16000000>;
-               clock-accuracy = <300000000>;
-               clock-output-names = "iosc";
-       };
-
        osc24M: osc24M_clk {
                #clock-cells = <0>;
                compatible = "fixed-clock";
                clock-output-names = "osc24M";
        };
 
-       osc32k: osc32k_clk {
+       ext_osc32k: ext_osc32k_clk {
                #clock-cells = <0>;
                compatible = "fixed-clock";
                clock-frequency = <32768>;
-               clock-output-names = "osc32k";
+               clock-output-names = "ext_osc32k";
        };
 
        psci {
                ccu: clock@3001000 {
                        compatible = "allwinner,sun50i-h6-ccu";
                        reg = <0x03001000 0x1000>;
-                       clocks = <&osc24M>, <&osc32k>, <&iosc>;
+                       clocks = <&osc24M>, <&rtc 0>, <&rtc 2>;
                        clock-names = "hosc", "losc", "iosc";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
                                     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_APB1>, <&osc24M>, <&osc32k>;
+                       clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc 0>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;
                        };
                };
 
+               rtc: rtc@7000000 {
+                       compatible = "allwinner,sun50i-h6-rtc";
+                       reg = <0x07000000 0x400>;
+                       interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-output-names = "osc32k", "osc32k-out", "iosc";
+                       clocks = <&ext_osc32k>;
+                       #clock-cells = <1>;
+               };
+
                r_ccu: clock@7010000 {
                        compatible = "allwinner,sun50i-h6-r-ccu";
                        reg = <0x07010000 0x400>;
-                       clocks = <&osc24M>, <&osc32k>, <&iosc>,
+                       clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
                                 <&ccu CLK_PLL_PERIPH0>;
                        clock-names = "hosc", "losc", "iosc", "pll-periph";
                        #clock-cells = <1>;
                        reg = <0x07022000 0x400>;
                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&osc32k>;
+                       clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&rtc 0>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;