pinctrl: sh-pfc: r8a7795: Add PWM support

This patch adds PWM[0-6] pinmux support to r8a7795 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[uli: adapted to mainline PFC driver]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
index 7f9d5b9..4066e98 100644 (file)
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
@@ -2535,6 +2535,105 @@ static const unsigned int msiof3_rxd_d_mux[] = {
        MSIOF3_RXD_D_MARK,
 };
 
+/* - PWM0 --------------------------------------------------------------------*/
+static const unsigned int pwm0_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(2, 6),
+};
+static const unsigned int pwm0_mux[] = {
+       PWM0_MARK,
+};
+/* - PWM1 --------------------------------------------------------------------*/
+static const unsigned int pwm1_a_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(2, 7),
+};
+static const unsigned int pwm1_a_mux[] = {
+       PWM1_A_MARK,
+};
+static const unsigned int pwm1_b_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(1, 8),
+};
+static const unsigned int pwm1_b_mux[] = {
+       PWM1_B_MARK,
+};
+/* - PWM2 --------------------------------------------------------------------*/
+static const unsigned int pwm2_a_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(2, 8),
+};
+static const unsigned int pwm2_a_mux[] = {
+       PWM2_A_MARK,
+};
+static const unsigned int pwm2_b_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(1, 11),
+};
+static const unsigned int pwm2_b_mux[] = {
+       PWM2_B_MARK,
+};
+/* - PWM3 --------------------------------------------------------------------*/
+static const unsigned int pwm3_a_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(1, 0),
+};
+static const unsigned int pwm3_a_mux[] = {
+       PWM3_A_MARK,
+};
+static const unsigned int pwm3_b_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(2, 2),
+};
+static const unsigned int pwm3_b_mux[] = {
+       PWM3_B_MARK,
+};
+/* - PWM4 --------------------------------------------------------------------*/
+static const unsigned int pwm4_a_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(1, 1),
+};
+static const unsigned int pwm4_a_mux[] = {
+       PWM4_A_MARK,
+};
+static const unsigned int pwm4_b_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(2, 3),
+};
+static const unsigned int pwm4_b_mux[] = {
+       PWM4_B_MARK,
+};
+/* - PWM5 --------------------------------------------------------------------*/
+static const unsigned int pwm5_a_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(1, 2),
+};
+static const unsigned int pwm5_a_mux[] = {
+       PWM5_A_MARK,
+};
+static const unsigned int pwm5_b_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(2, 4),
+};
+static const unsigned int pwm5_b_mux[] = {
+       PWM5_B_MARK,
+};
+/* - PWM6 --------------------------------------------------------------------*/
+static const unsigned int pwm6_a_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(1, 3),
+};
+static const unsigned int pwm6_a_mux[] = {
+       PWM6_A_MARK,
+};
+static const unsigned int pwm6_b_pins[] = {
+       /* PWM */
+       RCAR_GP_PIN(2, 5),
+};
+static const unsigned int pwm6_b_mux[] = {
+       PWM6_B_MARK,
+};
+
 /* - SATA --------------------------------------------------------------------*/
 static const unsigned int sata0_devslp_a_pins[] = {
        /* DEVSLP */
@@ -3316,6 +3415,19 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
        SH_PFC_PIN_GROUP(msiof3_ss1_d),
        SH_PFC_PIN_GROUP(msiof3_txd_d),
        SH_PFC_PIN_GROUP(msiof3_rxd_d),
+       SH_PFC_PIN_GROUP(pwm0),
+       SH_PFC_PIN_GROUP(pwm1_a),
+       SH_PFC_PIN_GROUP(pwm1_b),
+       SH_PFC_PIN_GROUP(pwm2_a),
+       SH_PFC_PIN_GROUP(pwm2_b),
+       SH_PFC_PIN_GROUP(pwm3_a),
+       SH_PFC_PIN_GROUP(pwm3_b),
+       SH_PFC_PIN_GROUP(pwm4_a),
+       SH_PFC_PIN_GROUP(pwm4_b),
+       SH_PFC_PIN_GROUP(pwm5_a),
+       SH_PFC_PIN_GROUP(pwm5_b),
+       SH_PFC_PIN_GROUP(pwm6_a),
+       SH_PFC_PIN_GROUP(pwm6_b),
        SH_PFC_PIN_GROUP(sata0_devslp_a),
        SH_PFC_PIN_GROUP(sata0_devslp_b),
        SH_PFC_PIN_GROUP(scif0_data),
@@ -3603,6 +3715,40 @@ static const char * const msiof3_groups[] = {
        "msiof3_rxd_d",
 };
 
+static const char * const pwm0_groups[] = {
+       "pwm0",
+};
+
+static const char * const pwm1_groups[] = {
+       "pwm1_a",
+       "pwm1_b",
+};
+
+static const char * const pwm2_groups[] = {
+       "pwm2_a",
+       "pwm2_b",
+};
+
+static const char * const pwm3_groups[] = {
+       "pwm3_a",
+       "pwm3_b",
+};
+
+static const char * const pwm4_groups[] = {
+       "pwm4_a",
+       "pwm4_b",
+};
+
+static const char * const pwm5_groups[] = {
+       "pwm5_a",
+       "pwm5_b",
+};
+
+static const char * const pwm6_groups[] = {
+       "pwm6_a",
+       "pwm6_b",
+};
+
 static const char * const sata0_groups[] = {
        "sata0_devslp_a",
        "sata0_devslp_b",
@@ -3750,6 +3896,13 @@ static const struct sh_pfc_function pinmux_functions[] = {
        SH_PFC_FUNCTION(msiof1),
        SH_PFC_FUNCTION(msiof2),
        SH_PFC_FUNCTION(msiof3),
+       SH_PFC_FUNCTION(pwm0),
+       SH_PFC_FUNCTION(pwm1),
+       SH_PFC_FUNCTION(pwm2),
+       SH_PFC_FUNCTION(pwm3),
+       SH_PFC_FUNCTION(pwm4),
+       SH_PFC_FUNCTION(pwm5),
+       SH_PFC_FUNCTION(pwm6),
        SH_PFC_FUNCTION(sata0),
        SH_PFC_FUNCTION(scif0),
        SH_PFC_FUNCTION(scif1),