haswell: set "Shader Channel Select" fields in surface state.
authorGwenole Beauchesne <gwenole.beauchesne@intel.com>
Tue, 18 Sep 2012 13:40:02 +0000 (09:40 -0400)
committerXiang, Haihao <haihao.xiang@intel.com>
Tue, 23 Oct 2012 05:56:02 +0000 (13:56 +0800)
For normal behaviour, each Shader Channel Select should be set to the
value indicating that same channel. i.e. Shader Channel Select Red is
set to SCS_RED, Shader Channel Select Green is set to SCS_GREEN, etc.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
src/i965_defines.h
src/i965_render.c
src/i965_structs.h

index d2ca6a7..51cabe2 100644 (file)
 #define I965_MIPFILTER_NEAREST     1   
 #define I965_MIPFILTER_LINEAR      3
 
+#define HSW_SCS_ZERO                      0
+#define HSW_SCS_ONE                       1
+#define HSW_SCS_RED                       4
+#define HSW_SCS_GREEN                     5
+#define HSW_SCS_BLUE                      6
+#define HSW_SCS_ALPHA                     7
+
 #define I965_TEXCOORDMODE_WRAP            0
 #define I965_TEXCOORDMODE_MIRROR          1
 #define I965_TEXCOORDMODE_CLAMP           2
index 7a9ea13..ecb2217 100644 (file)
@@ -695,6 +695,16 @@ gen7_render_set_surface_tiling(struct gen7_surface_state *ss, uint32_t tiling)
    }
 }
 
+/* Set "Shader Channel Select" */
+static void
+gen7_render_set_surface_scs(struct gen7_surface_state *ss)
+{
+    ss->ss7.shader_chanel_select_r = HSW_SCS_RED;
+    ss->ss7.shader_chanel_select_g = HSW_SCS_GREEN;
+    ss->ss7.shader_chanel_select_b = HSW_SCS_BLUE;
+    ss->ss7.shader_chanel_select_a = HSW_SCS_ALPHA;
+}
+
 static void
 gen7_render_set_surface_state(
     struct gen7_surface_state *ss,
@@ -765,6 +775,8 @@ i965_render_src_surface_state(
                                       region, offset,
                                       w, h,
                                       pitch, format, flags);
+        if (IS_HASWELL(i965->intel.device_id))
+            gen7_render_set_surface_scs(ss);
         dri_bo_emit_reloc(ss_bo,
                           I915_GEM_DOMAIN_SAMPLER, 0,
                           offset,
@@ -888,6 +900,8 @@ i965_render_dest_surface_state(VADriverContextP ctx, int index)
                                       dest_region->bo, 0,
                                       dest_region->width, dest_region->height,
                                       dest_region->pitch, format, 0);
+        if (IS_HASWELL(i965->intel.device_id))
+            gen7_render_set_surface_scs(ss);
         dri_bo_emit_reloc(ss_bo,
                           I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
                           0,
index 12a8d14..6e81342 100644 (file)
@@ -1195,7 +1195,11 @@ struct gen7_surface_state
 
     struct {
         unsigned int resource_min_lod:12;
-        unsigned int pad0:16;
+        unsigned int pad0:4;
+        unsigned int shader_chanel_select_a:3;
+        unsigned int shader_chanel_select_b:3;
+        unsigned int shader_chanel_select_g:3;
+        unsigned int shader_chanel_select_r:3;
         unsigned int alpha_clear_color:1;
         unsigned int blue_clear_color:1;
         unsigned int green_clear_color:1;