* arm.md (stack_tie): New insn. Use an idiom that the alias code
authorrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 16 Jul 2002 15:14:22 +0000 (15:14 +0000)
committerrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 16 Jul 2002 15:14:22 +0000 (15:14 +0000)
understands to be a memory clobber.
* arm.c (arm_expand_prologue): Use it.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@55486 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/arm/arm.c
gcc/config/arm/arm.md

index 1005b8c..ea6617b 100644 (file)
@@ -1,3 +1,9 @@
+2002-07-16  Richard Earnshaw  <rearnsha@arm.com>
+
+       * arm.md (stack_tie): New insn.  Use an idiom that the alias code
+       understands to be a memory clobber.
+       * arm.c (arm_expand_prologue): Use it.
+
 2002-07-16  Daniel Berlin  <dberlin@dberlin.org>
 
        * ra-rewrite.c: #include reload.h, insn-config.h
index 17d7750..0632397 100644 (file)
@@ -8387,15 +8387,8 @@ arm_expand_prologue ()
         will prevent the scheduler from moving stores to the frame
         before the stack adjustment.  */
       if (frame_pointer_needed)
-       {
-         rtx unspec = gen_rtx_UNSPEC (SImode,
-                                      gen_rtvec (2, stack_pointer_rtx,
-                                                 hard_frame_pointer_rtx),
-                                      UNSPEC_PRLG_STK);
-
-         insn = emit_insn (gen_rtx_CLOBBER (VOIDmode,
-                                     gen_rtx_MEM (BLKmode, unspec)));
-       }
+       insn = emit_insn (gen_stack_tie (stack_pointer_rtx,
+                                        hard_frame_pointer_rtx));
     }
 
   /* If we are profiling, make sure no instructions are scheduled before
index 8b45862..8e4b9c0 100644 (file)
   [(set_attr "type" "store4")]
 )
 
+(define_insn "stack_tie"
+  [(set (mem:BLK (scratch))
+       (unspec:BLK [(match_operand:SI 0 "s_register_operand" "r")
+                    (match_operand:SI 1 "s_register_operand" "r")]
+                   UNSPEC_PRLG_STK))]
+  ""
+  ""
+  [(set_attr "length" "0")]
+)
+
 ;; Similarly for the floating point registers
 (define_insn "*push_fp_multi"
   [(match_parallel 2 "multi_register_push"