drm/amd/powerplay: let PMFW to handle the features disablement on BACO in V2
authorEvan Quan <evan.quan@amd.com>
Fri, 29 May 2020 18:38:53 +0000 (14:38 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 1 Jul 2020 05:59:14 +0000 (01:59 -0400)
For Sienna_Cichlid, PMFW will handle the features disablement on BACO in. No
need to have driver stepped in.

V2: limit this for baco really

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

index 8469774..db348e4 100644 (file)
@@ -1530,6 +1530,11 @@ static int smu_suspend(void *handle)
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
        struct smu_context *smu = &adev->smu;
        int ret;
+       bool use_baco = !smu->is_apu &&
+               ((adev->in_gpu_reset &&
+                 (amdgpu_asic_reset_method(adev) == AMD_RESET_METHOD_BACO)) ||
+                (adev->in_runpm && amdgpu_asic_supports_baco(adev)));
+
 
        if (amdgpu_sriov_vf(adev)&& !amdgpu_sriov_is_pp_one_vf(adev))
                return 0;
@@ -1547,15 +1552,22 @@ static int smu_suspend(void *handle)
                return ret;
        }
 
-       ret = smu_disable_dpm(smu);
-       if (ret)
-               return ret;
+       /*
+        * For Sienna_Cichlid, PMFW will handle the features disablement properly
+        * on BACO in. Driver involvement is unnecessary.
+        */
+       if ((adev->asic_type != CHIP_SIENNA_CICHLID) || !use_baco) {
+               ret = smu_disable_dpm(smu);
+               if (ret)
+                       return ret;
+
+               if (adev->asic_type >= CHIP_NAVI10 &&
+                   adev->gfx.rlc.funcs->stop)
+                       adev->gfx.rlc.funcs->stop(adev);
+       }
 
        smu->watermarks_bitmap &= ~(WATERMARKS_LOADED);
 
-       if (adev->asic_type >= CHIP_NAVI10 &&
-           adev->gfx.rlc.funcs->stop)
-               adev->gfx.rlc.funcs->stop(adev);
        if (smu->is_apu)
                smu_set_gfx_cgpg(&adev->smu, false);