bug, nand, am33xx: nand->ecc.strength not set in board_nand_init()
authorSergey Lapin <slapin@ossfans.org>
Tue, 4 Jun 2013 16:42:43 +0000 (11:42 -0500)
committerScott Wood <scottwood@freescale.com>
Tue, 4 Jun 2013 16:50:04 +0000 (11:50 -0500)
commit dfe64e2c89731a3f9950d7acd8681b68df2bae03
Author: Sergey Lapin <slapin@ossfans.org>
Date:   Mon Jan 14 03:46:50 2013 +0000

    mtd: resync with Linux-3.7.1

Introduced runtime bug:

U-Boot 2013.04-00499-g46567df-dirty (Jun 04 2013 - 08:17:08)

I2C:   ready
DRAM:  512 MiB
WARNING: Caches not enabled
NAND:  BUG: failure at nand_base.c:3214/nand_scan_tail()!
BUG!
resetting ...

on boards using drivers/mtd/nand/omap_gpmc.c as in board_nand_init()
nand->ecc.strength is not set. Fix this!

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Sergey Lapin <slapin@ossfans.org>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Tom Rini <trini@ti.com>
drivers/mtd/nand/omap_gpmc.c

index d5f3248..5d08822 100644 (file)
@@ -936,6 +936,7 @@ int board_nand_init(struct nand_chip *nand)
        nand->ecc.layout = &hw_bch8_nand_oob;
        nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
        nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
+       nand->ecc.strength = 8;
        nand->ecc.hwctl = omap_enable_ecc_bch;
        nand->ecc.correct = omap_correct_data_bch;
        nand->ecc.calculate = omap_calculate_ecc_bch;
@@ -954,6 +955,7 @@ int board_nand_init(struct nand_chip *nand)
        nand->ecc.hwctl = omap_enable_hwecc;
        nand->ecc.correct = omap_correct_data;
        nand->ecc.calculate = omap_calculate_ecc;
+       nand->ecc.strength = 1;
        omap_hwecc_init(nand);
 #endif
 #endif