radv: enable TC-compat HTILE in GENERAL on GFX10+

GFX10+ supports compressed writes to HTILE, so it should just work
to skip decompressions when transitioning from/to GENERAL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8039>

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 2010c37..c362b0f 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1763,7 +1763,7 @@ radv_update_zrange_precision(struct radv_cmd_buffer *cmd_buffer,
            !radv_image_is_tc_compat_htile(image))
                return;
 
-       if (!radv_layout_is_htile_compressed(image, layout, in_render_loop,
+       if (!radv_layout_is_htile_compressed(cmd_buffer->device, image, layout, in_render_loop,
                                             radv_image_queue_family_mask(image,
                                                                          cmd_buffer->queue_family_index,
                                                                          cmd_buffer->queue_family_index))) {
@@ -1806,7 +1806,7 @@ radv_emit_fb_ds_state(struct radv_cmd_buffer *cmd_buffer,
        uint32_t db_z_info = ds->db_z_info;
        uint32_t db_stencil_info = ds->db_stencil_info;
 
-       if (!radv_layout_is_htile_compressed(image, layout, in_render_loop,
+       if (!radv_layout_is_htile_compressed(cmd_buffer->device, image, layout, in_render_loop,
                                             radv_image_queue_family_mask(image,
                                                                          cmd_buffer->queue_family_index,
                                                                          cmd_buffer->queue_family_index))) {
@@ -2419,7 +2419,7 @@ radv_emit_framebuffer_state(struct radv_cmd_buffer *cmd_buffer)
                        cmd_buffer->state.offset_scale = cmd_buffer->state.attachments[idx].ds.offset_scale;
                }
 
-               if (radv_layout_is_htile_compressed(iview->image, layout, in_render_loop,
+               if (radv_layout_is_htile_compressed(cmd_buffer->device, iview->image, layout, in_render_loop,
                                                    radv_image_queue_family_mask(iview->image,
                                                                                 cmd_buffer->queue_family_index,
                                                                                 cmd_buffer->queue_family_index))) {
@@ -6048,16 +6048,18 @@ static void radv_handle_depth_image_transition(struct radv_cmd_buffer *cmd_buffe
                                               const VkImageSubresourceRange *range,
                                               struct radv_sample_locations_state *sample_locs)
 {
+       struct radv_device *device = cmd_buffer->device;
+
        if (!radv_image_has_htile(image))
                return;
 
        if (src_layout == VK_IMAGE_LAYOUT_UNDEFINED) {
                radv_initialize_htile(cmd_buffer, image, range);
-       } else if (!radv_layout_is_htile_compressed(image, src_layout, src_render_loop, src_queue_mask) &&
-                  radv_layout_is_htile_compressed(image, dst_layout, dst_render_loop, dst_queue_mask)) {
+       } else if (!radv_layout_is_htile_compressed(device, image, src_layout, src_render_loop, src_queue_mask) &&
+                  radv_layout_is_htile_compressed(device, image, dst_layout, dst_render_loop, dst_queue_mask)) {
                radv_initialize_htile(cmd_buffer, image, range);
-       } else if (radv_layout_is_htile_compressed(image, src_layout, src_render_loop, src_queue_mask) &&
-                  !radv_layout_is_htile_compressed(image, dst_layout, dst_render_loop, dst_queue_mask)) {
+       } else if (radv_layout_is_htile_compressed(device, image, src_layout, src_render_loop, src_queue_mask) &&
+                  !radv_layout_is_htile_compressed(device, image, dst_layout, dst_render_loop, dst_queue_mask)) {
                cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB |
                                                RADV_CMD_FLAG_FLUSH_AND_INV_DB_META;
 

diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 2d46b1d..104f589 100644 (file)
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -1744,7 +1744,8 @@ radv_image_view_init(struct radv_image_view *iview,
        }
 }
 
-bool radv_layout_is_htile_compressed(const struct radv_image *image,
+bool radv_layout_is_htile_compressed(const struct radv_device *device,
+                                    const struct radv_image *image,
                                      VkImageLayout layout,
                                     bool in_render_loop,
                                      unsigned queue_mask)
@@ -1765,10 +1766,15 @@ bool radv_layout_is_htile_compressed(const struct radv_image *image,
                 * depth pass because this allows compression and this reduces
                 * the number of decompressions from/to GENERAL.
                 */
-               return radv_image_is_tc_compat_htile(image) &&
-                      queue_mask == (1u << RADV_QUEUE_GENERAL) &&
-                      !(image->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
-                      !in_render_loop;
+               if (radv_image_is_tc_compat_htile(image) &&
+                   queue_mask == (1u << RADV_QUEUE_GENERAL)) {
+                       /* GFX10+ supports compressed writes to HTILE. */
+                       return device->physical_device->rad_info.chip_class >= GFX10 ||
+                              (!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
+                               !in_render_loop);
+               } else {
+                       return false;
+               }
        default:
            return radv_image_is_tc_compat_htile(image);
        }

diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index 2f09ec9..64a6185 100644 (file)
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -703,7 +703,7 @@ static bool depth_view_can_fast_clear(struct radv_cmd_buffer *cmd_buffer,
            iview->base_mip == 0 &&
            iview->base_layer == 0 &&
            iview->layer_count == iview->image->info.array_size &&
-           radv_layout_is_htile_compressed(iview->image, layout, in_render_loop, queue_mask) &&
+           radv_layout_is_htile_compressed(cmd_buffer->device, iview->image, layout, in_render_loop, queue_mask) &&
            radv_image_extent_compare(iview->image, &iview->extent))
                return true;
        return false;
@@ -1062,7 +1062,7 @@ radv_can_fast_clear_depth(struct radv_cmd_buffer *cmd_buffer,
        if (!radv_image_view_can_fast_clear(cmd_buffer->device, iview))
                return false;
 
-       if (!radv_layout_is_htile_compressed(iview->image, image_layout, in_render_loop,
+       if (!radv_layout_is_htile_compressed(cmd_buffer->device, iview->image, image_layout, in_render_loop,
                                             radv_image_queue_family_mask(iview->image,
                                                                          cmd_buffer->queue_family_index,
                                                                          cmd_buffer->queue_family_index)))

diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 63f16b9..df4a9e3 100644 (file)
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1923,7 +1923,8 @@ struct radv_image {
  * If this is false reads that don't use the htile should be able to return
  * correct results.
  */
-bool radv_layout_is_htile_compressed(const struct radv_image *image,
+bool radv_layout_is_htile_compressed(const struct radv_device *device,
+                                    const struct radv_image *image,
                                      VkImageLayout layout,
                                      bool in_render_loop,
                                      unsigned queue_mask);