ARM: dts: k3-j7200-mcu-wakeup: Add CPSW2G support

Add MCU NAVSS, UDMA and CPSW2G DT nodes.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

diff --git a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
index 8ea25de..4c899c8 100644 (file)
--- a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
@@ -142,6 +142,49 @@
                power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>;
        };
 
+       cbass_mcu_navss: mcu-navss {
+               compatible = "simple-mfd";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+               dma-coherent;
+               dma-ranges;
+
+               ti,sci-dev-id = <232>;
+
+               mcu_ringacc: ringacc@2b800000 {
+                       compatible = "ti,am654-navss-ringacc";
+                       reg =   <0x0 0x2b800000 0x0 0x400000>,
+                               <0x0 0x2b000000 0x0 0x400000>,
+                               <0x0 0x28590000 0x0 0x100>,
+                               <0x0 0x2a500000 0x0 0x40000>;
+                       reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
+                       ti,num-rings = <286>;
+                       ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
+                       ti,sci = <&dmsc>;
+                       ti,sci-dev-id = <235>;
+               };
+
+               mcu_udmap: dma-controller@285c0000 {
+                       compatible = "ti,j721e-navss-mcu-udmap";
+                       reg =   <0x0 0x285c0000 0x0 0x100>,
+                               <0x0 0x2a800000 0x0 0x40000>,
+                               <0x0 0x2aa00000 0x0 0x40000>;
+                       reg-names = "gcfg", "rchanrt", "tchanrt";
+                       #dma-cells = <1>;
+
+                       ti,sci = <&dmsc>;
+                       ti,sci-dev-id = <236>;
+                       ti,ringacc = <&mcu_ringacc>;
+
+                       ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
+                                               <0x0f>; /* TX_HCHAN */
+                       ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
+                                               <0x0b>; /* RX_HCHAN */
+                       ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
+               };
+       };
+
        wkup_gpio0: gpio@42110000 {
                compatible = "ti,j721e-gpio", "ti,keystone-gpio";
                reg = <0x0 0x42110000 0x0 0x100>;
@@ -153,4 +196,77 @@
                clocks = <&k3_clks 113 0>;
                clock-names = "gpio";
        };
+
+       mcu_conf: scm_conf@40f00000 {
+               compatible = "syscon", "simple-mfd";
+               reg = <0x0 0x40f00000 0x0 0x20000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x0 0x0 0x40f00000 0x20000>;
+
+               phy_gmii_sel: phy@4040 {
+                       compatible = "ti,am654-cpsw-phy-sel";
+                       reg = <0x4040 0x4>;
+                       reg-names = "gmii-sel";
+                       #phy-cells = <1>;
+               };
+       };
+
+       mcu_cpsw: ethernet@46000000 {
+               compatible = "ti,j721e-cpsw-nuss";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               reg = <0x0 0x46000000 0x0 0x200000>;
+               reg-names = "cpsw_nuss";
+               ranges;
+               dma-coherent;
+               clocks = <&k3_clks 18 21>;
+               clock-names = "fck";
+               power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
+
+               dmas = <&mcu_udmap 0xf000>,
+                      <&mcu_udmap 0xf001>,
+                      <&mcu_udmap 0xf002>,
+                      <&mcu_udmap 0xf003>,
+                      <&mcu_udmap 0xf004>,
+                      <&mcu_udmap 0xf005>,
+                      <&mcu_udmap 0xf006>,
+                      <&mcu_udmap 0xf007>,
+                      <&mcu_udmap 0x7000>;
+               dma-names = "tx0", "tx1", "tx2", "tx3",
+                           "tx4", "tx5", "tx6", "tx7",
+                           "rx";
+
+               ethernet-ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       cpsw_port1: port@1 {
+                               reg = <1>;
+                               ti,mac-only;
+                               ti,label = "port1";
+                               ti,syscon-efuse = <&mcu_conf 0x200>;
+                               phys = <&phy_gmii_sel 1>;
+                       };
+               };
+
+               davinci_mdio: mdio@f00 {
+                       compatible = "ti,cpsw-mdio","ti,davinci_mdio";
+                       reg = <0x0 0xf00 0x0 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       clocks = <&k3_clks 18 21>;
+                       clock-names = "fck";
+                       bus_freq = <1000000>;
+               };
+
+               cpts {
+                       clocks = <&k3_clks 18 2>;
+                       clock-names = "cpts";
+                       interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "cpts";
+                       ti,cpts-ext-ts-inputs = <4>;
+                       ti,cpts-periodic-outputs = <2>;
+               };
+       };
 };