drm/i915: Implement async flip for ilk/snb
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 11 Jan 2021 16:37:10 +0000 (18:37 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 29 Jan 2021 17:04:28 +0000 (19:04 +0200)
Add support for async flips on ivb/hsw. Again no need for any
workarounds and just have to deal with the interrupt bits being
shuffled around a bit.

Cc: Karthik B S <karthik.b.s@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210111163711.12913-11-ville.syrjala@linux.intel.com
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
drivers/gpu/drm/i915/display/i9xx_plane.c
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/i915_irq.c

index f75be22..488ed01 100644 (file)
@@ -559,6 +559,26 @@ ivb_primary_disable_flip_done(struct intel_plane *plane)
        spin_unlock_irq(&i915->irq_lock);
 }
 
+static void
+ilk_primary_enable_flip_done(struct intel_plane *plane)
+{
+       struct drm_i915_private *i915 = to_i915(plane->base.dev);
+
+       spin_lock_irq(&i915->irq_lock);
+       ilk_enable_display_irq(i915, DE_PLANE_FLIP_DONE(plane->i9xx_plane));
+       spin_unlock_irq(&i915->irq_lock);
+}
+
+static void
+ilk_primary_disable_flip_done(struct intel_plane *plane)
+{
+       struct drm_i915_private *i915 = to_i915(plane->base.dev);
+
+       spin_lock_irq(&i915->irq_lock);
+       ilk_disable_display_irq(i915, DE_PLANE_FLIP_DONE(plane->i9xx_plane));
+       spin_unlock_irq(&i915->irq_lock);
+}
+
 static bool i9xx_plane_get_hw_state(struct intel_plane *plane,
                                    enum pipe *pipe)
 {
@@ -781,6 +801,10 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
                plane->async_flip = g4x_primary_async_flip;
                plane->enable_flip_done = ivb_primary_enable_flip_done;
                plane->disable_flip_done = ivb_primary_disable_flip_done;
+       } else if (IS_GEN_RANGE(dev_priv, 5, 6)) {
+               plane->async_flip = g4x_primary_async_flip;
+               plane->enable_flip_done = ilk_primary_enable_flip_done;
+               plane->disable_flip_done = ilk_primary_disable_flip_done;
        }
 
        if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))
index 5d350c9..2ae49da 100644 (file)
@@ -1320,7 +1320,8 @@ static unsigned int intel_linear_alignment(const struct drm_i915_private *dev_pr
 static bool has_async_flips(struct drm_i915_private *i915)
 {
        return INTEL_GEN(i915) >= 9 || IS_BROADWELL(i915) ||
-               IS_HASWELL(i915) || IS_IVYBRIDGE(i915);
+               IS_HASWELL(i915) || IS_IVYBRIDGE(i915) ||
+               IS_GEN_RANGE(i915, 5, 6);
 }
 
 static unsigned int intel_surf_alignment(const struct drm_framebuffer *fb,
index 2e836c0..4e6fb1e 100644 (file)
@@ -2052,6 +2052,9 @@ static void ilk_display_irq_handler(struct drm_i915_private *dev_priv,
                if (de_iir & DE_PIPE_VBLANK(pipe))
                        intel_handle_vblank(dev_priv, pipe);
 
+               if (de_iir & DE_PLANE_FLIP_DONE(pipe))
+                       flip_done_handler(dev_priv, pipe);
+
                if (de_iir & DE_PIPE_FIFO_UNDERRUN(pipe))
                        intel_cpu_fifo_underrun_irq_handler(dev_priv, pipe);
 
@@ -3600,6 +3603,8 @@ static void ilk_irq_postinstall(struct drm_i915_private *dev_priv)
                                DE_PIPEA_CRC_DONE | DE_POISON);
                extra_mask = (DE_PIPEA_VBLANK | DE_PIPEB_VBLANK |
                              DE_PIPEB_FIFO_UNDERRUN | DE_PIPEA_FIFO_UNDERRUN |
+                             DE_PLANE_FLIP_DONE(PLANE_A) |
+                             DE_PLANE_FLIP_DONE(PLANE_B) |
                              DE_DP_A_HOTPLUG);
        }