Changes for U-Boot 1.0.2:
======================================================================
+* Patches by Thomas Viehweger, 16 Mar 2004:
+ - show PCI clock frequency on MPC8260 systems
+ - add FCC_PSMR_RMII flag for HiP7 processors
+ - in do_jffs2_fsload(), take load address from load_addr if not set
+ explicit, update load_addr otherwise
+ - replaced printf by putc/puts when no formatting is needed
+ (smaller code size, faster execution)
+
* Patch by Phillippe Robin, 16 Mar 2004:
avoid dereferencing NULL pointer in lib_arm/armlinux.c
memmove (hdr, (char *)addr, sizeof(image_header_t));
if (ntohl(hdr->ih_magic) != IH_MAGIC) {
- printf ("Bad magic number\n");
+ puts ("Bad magic number\n");
return 1;
}
len = sizeof (image_header_t);
data = (ulong)hdr;
if (crc32(0, (char *)data, len) != crc) {
- printf ("Bad header crc\n");
+ puts ("Bad header crc\n");
return 1;
}
if (verify) {
if (crc32(0, (char *)data, len) != ntohl(hdr->ih_dcrc)) {
- printf ("Bad data crc\n");
+ puts ("Bad data crc\n");
return 1;
}
}
if (hdr->ih_type != IH_TYPE_SCRIPT) {
- printf ("Bad image type\n");
+ puts ("Bad image type\n");
return 1;
}
len_ptr = (ulong *)data;
if ((len = ntohl(*len_ptr)) == 0) {
- printf ("Empty Script\n");
+ puts ("Empty Script\n");
return 1;
}
#endif
print_str ("busfreq", strmhz(buf, bd->bi_busfreq));
#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_ML300 */
- printf ("ethaddr =");
+ puts ("ethaddr =");
for (i=0; i<6; ++i) {
printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
}
#if (defined CONFIG_PN62) || (defined CONFIG_PPCHAMELEONEVB) \
|| (defined CONFIG_MPC8540ADS) || (defined CONFIG_MPC8560ADS)
- printf ("\neth1addr =");
+ puts ("\neth1addr =");
for (i=0; i<6; ++i) {
printf ("%c%02X", i ? ':' : ' ', bd->bi_enet1addr[i]);
}
#endif /* CONFIG_PN62 */
#if defined(CONFIG_MPC8540ADS) || defined(CONFIG_MPC8560ADS)
- printf ("\neth2addr =");
+ puts ("\neth2addr =");
for (i=0; i<6; ++i) {
printf ("%c%02X", i ? ':' : ' ', bd->bi_enet2addr[i]);
}
#ifdef CONFIG_HERMES
print_str ("ethspeed", strmhz(buf, bd->bi_ethspeed));
#endif
- printf ("\nIP addr = "); print_IPaddr (bd->bi_ip_addr);
+ puts ("\nIP addr = "); print_IPaddr (bd->bi_ip_addr);
printf ("\nbaudrate = %6ld bps\n", bd->bi_baudrate );
return 0;
}
print_num ("flashsize", (ulong)bd->bi_flashsize);
print_num ("flashoffset", (ulong)bd->bi_flashoffset);
- printf ("ethaddr =");
+ puts ("ethaddr =");
for (i=0; i<6; ++i) {
printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
}
- printf ("\nip_addr = ");
+ puts ("\nip_addr = ");
print_IPaddr (bd->bi_ip_addr);
printf ("\nbaudrate = %ld bps\n", bd->bi_baudrate);
print_num ("flashsize", (ulong)bd->bi_flashsize);
print_num ("flashoffset", (ulong)bd->bi_flashoffset);
- printf ("ethaddr =");
+ puts ("ethaddr =");
for (i=0; i<6; ++i) {
printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
}
- printf ("\nip_addr = ");
+ puts ("\nip_addr = ");
print_IPaddr (bd->bi_ip_addr);
printf ("\nbaudrate = %d bps\n", bd->bi_baudrate);
print_num("-> size", bd->bi_dram[i].size);
}
- printf ("ethaddr =");
+ puts ("ethaddr =");
for (i=0; i<6; ++i) {
printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
}
- printf ("\n"
+ puts ( "\n"
"ip_addr = ");
print_IPaddr (bd->bi_ip_addr);
- printf ("\n"
+ puts ( "\n"
"baudrate = %d bps\n", bd->bi_baudrate);
return 0;
} else
#endif /* __I386__ */
{
- printf ("Bad Magic Number\n");
+ puts ("Bad Magic Number\n");
SHOW_BOOT_PROGRESS (-1);
return 1;
}
hdr->ih_hcrc = 0;
if (crc32 (0, (char *)data, len) != checksum) {
- printf ("Bad Header Checksum\n");
+ puts ("Bad Header Checksum\n");
SHOW_BOOT_PROGRESS (-2);
return 1;
}
#endif
if (verify) {
- printf (" Verifying Checksum ... ");
+ puts (" Verifying Checksum ... ");
if (crc32 (0, (char *)data, len) != ntohl(hdr->ih_dcrc)) {
printf ("Bad Data CRC\n");
SHOW_BOOT_PROGRESS (-3);
return 1;
}
- printf ("OK\n");
+ puts ("OK\n");
}
SHOW_BOOT_PROGRESS (4);
printf (" Uncompressing %s ... ", name);
if (gunzip ((void *)ntohl(hdr->ih_load), unc_len,
(uchar *)data, (int *)&len) != 0) {
- printf ("GUNZIP ERROR - must RESET board to recover\n");
+ puts ("GUNZIP ERROR - must RESET board to recover\n");
SHOW_BOOT_PROGRESS (-6);
do_reset (cmdtp, flag, argc, argv);
}
SHOW_BOOT_PROGRESS (-7);
return 1;
}
- printf ("OK\n");
+ puts ("OK\n");
SHOW_BOOT_PROGRESS (7);
switch (hdr->ih_type) {
SHOW_BOOT_PROGRESS (-9);
#ifdef DEBUG
- printf ("\n## Control returned to monitor - resetting...\n");
+ puts ("\n## Control returned to monitor - resetting...\n");
do_reset (cmdtp, flag, argc, argv);
#endif
return 1;
memmove (&header, (char *)addr, sizeof(image_header_t));
if (hdr->ih_magic != IH_MAGIC) {
- printf ("Bad Magic Number\n");
+ puts ("Bad Magic Number\n");
SHOW_BOOT_PROGRESS (-10);
do_reset (cmdtp, flag, argc, argv);
}
hdr->ih_hcrc = 0;
if (crc32 (0, (char *)data, len) != checksum) {
- printf ("Bad Header Checksum\n");
+ puts ("Bad Header Checksum\n");
SHOW_BOOT_PROGRESS (-11);
do_reset (cmdtp, flag, argc, argv);
}
ulong cdata = data, edata = cdata + len;
#endif /* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */
- printf (" Verifying Checksum ... ");
+ puts (" Verifying Checksum ... ");
#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
#endif /* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */
if (csum != hdr->ih_dcrc) {
- printf ("Bad Data CRC\n");
+ puts ("Bad Data CRC\n");
SHOW_BOOT_PROGRESS (-12);
do_reset (cmdtp, flag, argc, argv);
}
- printf ("OK\n");
+ puts ("OK\n");
}
SHOW_BOOT_PROGRESS (11);
if ((hdr->ih_os != IH_OS_LINUX) ||
(hdr->ih_arch != IH_CPU_PPC) ||
(hdr->ih_type != IH_TYPE_RAMDISK) ) {
- printf ("No Linux PPC Ramdisk Image\n");
+ puts ("No Linux PPC Ramdisk Image\n");
SHOW_BOOT_PROGRESS (-13);
do_reset (cmdtp, flag, argc, argv);
}
#else /* !(CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG) */
memmove ((void *)initrd_start, (void *)data, len);
#endif /* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */
- printf ("OK\n");
+ puts ("OK\n");
}
} else {
initrd_start = 0;
memmove (&header, (char *)addr, sizeof(image_header_t));
if (ntohl(hdr->ih_magic) != IH_MAGIC) {
- printf (" Bad Magic Number\n");
+ puts (" Bad Magic Number\n");
return 1;
}
hdr->ih_hcrc = 0;
if (crc32 (0, (char *)data, len) != checksum) {
- printf (" Bad Header Checksum\n");
+ puts (" Bad Header Checksum\n");
return 1;
}
data = addr + sizeof(image_header_t);
len = ntohl(hdr->ih_size);
- printf (" Verifying Checksum ... ");
+ puts (" Verifying Checksum ... ");
if (crc32 (0, (char *)data, len) != ntohl(hdr->ih_dcrc)) {
- printf (" Bad Data CRC\n");
+ puts (" Bad Data CRC\n");
return 1;
}
- printf ("OK\n");
+ puts ("OK\n");
return 0;
}
data = (ulong)hdr + sizeof(image_header_t);
len = ntohl(hdr->ih_size);
- printf (" Verifying Checksum ... ");
+ puts (" Verifying Checksum ... ");
if (crc32 (0, (char *)data, len) != ntohl(hdr->ih_dcrc)) {
- printf (" Bad Data CRC\n");
+ puts (" Bad Data CRC\n");
}
- printf ("OK\n");
+ puts ("OK\n");
next_sector: ;
}
next_bank: ;
tm.tm_year, tm.tm_mon, tm.tm_mday,
tm.tm_hour, tm.tm_min, tm.tm_sec);
#endif /* CFG_CMD_DATE, CONFIG_TIMESTAMP */
- printf (" Image Type: "); print_type(hdr); printf ("\n");
- printf (" Data Size: %d Bytes = ", ntohl(hdr->ih_size));
+ puts (" Image Type: "); print_type(hdr);
+ printf ("\n Data Size: %d Bytes = ", ntohl(hdr->ih_size));
print_size (ntohl(hdr->ih_size), "\n");
- printf (" Load Address: %08x\n", ntohl(hdr->ih_load));
- printf (" Entry Point: %08x\n", ntohl(hdr->ih_ep));
+ printf (" Load Address: %08x\n"
+ " Entry Point: %08x\n",
+ ntohl(hdr->ih_load), ntohl(hdr->ih_ep));
if (hdr->ih_type == IH_TYPE_MULTI) {
int i;
ulong len;
ulong *len_ptr = (ulong *)((ulong)hdr + sizeof(image_header_t));
- printf (" Contents:\n");
+ puts (" Contents:\n");
for (i=0; (len = ntohl(*len_ptr)); ++i, ++len_ptr) {
printf (" Image %d: %8ld Bytes = ", i, len);
print_size (len, "\n");
i = 10;
flags = src[3];
if (src[2] != DEFLATED || (flags & RESERVED) != 0) {
- printf ("Error: Bad gzipped data\n");
+ puts ("Error: Bad gzipped data\n");
return (-1);
}
if ((flags & EXTRA_FIELD) != 0)
if ((flags & HEAD_CRC) != 0)
i += 2;
if (i >= *lenp) {
- printf ("Error: gunzip out of data in header\n");
+ puts ("Error: gunzip out of data in header\n");
return (-1);
}
switch (argc) {
case 2: /* set date & time */
if (strcmp(argv[1],"reset") == 0) {
- printf ("Reset RTC...\n");
+ puts ("Reset RTC...\n");
rtc_reset ();
} else {
/* initialize tm with current time */
rtc_get (&tm);
/* insert new date & time */
if (mk_date (argv[1], &tm) != 0) {
- printf ("## Bad date format\n");
+ puts ("## Bad date format\n");
return 1;
}
/* and write to RTC */
if (argc == 1 || strcmp (argv[1], "run") != 0) {
/* List test info */
if (argc == 1) {
- printf ("Available hardware tests:\n");
+ puts ("Available hardware tests:\n");
post_info (NULL);
- printf ("Use 'diag [<test1> [<test2> ...]]'"
+ puts ("Use 'diag [<test1> [<test2> ...]]'"
" to get more info.\n");
- printf ("Use 'diag run [<test1> [<test2> ...]]'"
+ puts ("Use 'diag run [<test1> [<test2> ...]]'"
" to run tests.\n");
} else {
for (i = 1; i < argc; i++) {
rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);
- printf ("done\n");
+ puts ("done\n");
return rcode;
} else if (strcmp (argv[1], "write") == 0) {
int rcode;
rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);
- printf ("done\n");
+ puts ("done\n");
return rcode;
}
}
#endif
}
if (i == MAX_ACKNOWLEDGE_POLLS) {
- printf("EEPROM poll acknowledge failed\n");
+ puts ("EEPROM poll acknowledge failed\n");
rcode = 1;
}
}
if ((tmp = getenv ("loadaddr")) != NULL) {
addr = simple_strtoul (tmp, NULL, 16);
} else {
- printf ("No load address provided\n");
+ puts ("No load address provided\n");
return 1;
}
tmp = (char *) CFG_ETHERNET_MAC_ADDR;
memcpy ((char *) tmp, (char *) &gd->bd->bi_enetaddr[0], 6);
#else
- printf ("## Ethernet MAC address not copied to NV RAM\n");
+ puts ("## Ethernet MAC address not copied to NV RAM\n");
#endif
/*
* to just copy
*/
- printf ("No bootargs defined\n");
+ puts ("No bootargs defined\n");
return 1;
#endif
}
if (valid_elf_image (addr)) {
addr = load_elf_image (addr);
} else {
- printf ("## Not an ELF image, assuming binary\n");
+ puts ("## Not an ELF image, assuming binary\n");
/* leave addr as load_addr */
}
((void (*)(void)) addr) ();
- printf ("## vxWorks terminated\n");
+ puts ("## vxWorks terminated\n");
return 1;
}
if (addr_last > b_end) {
s_last[bank] = s_end;
} else {
- printf ("Error: end address"
+ puts ("Error: end address"
" not on sector boundary\n");
rcode = 1;
break;
}
}
if (s_last[bank] < s_first[bank]) {
- printf ("Error: end sector"
+ puts ("Error: end sector"
" precedes start sector\n");
rcode = 1;
break;
addr_first = (sect == s_end) ? b_end + 1: info->start[sect + 1];
(*s_count) += s_last[bank] - s_first[bank] + 1;
} else if (s_last[bank] >= 0) {
- printf("Error: cannot span across banks when they are"
+ puts ("Error: cannot span across banks when they are"
" mapped in reverse order\n");
rcode = 1;
break;
if ((n = abbrev_spec(argv[1], &info, §_first, §_last)) != 0) {
if (n < 0) {
- printf("Bad sector specification\n");
+ puts ("Bad sector specification\n");
return 1;
}
printf ("Erase Flash Sectors %d-%d in Bank # %d ",
}
printf ("Erased %d sectors\n", erased);
} else if (rcode == 0) {
- printf ("Error: start and/or end address"
+ puts ("Error: start and/or end address"
" not on sector boundary\n");
rcode = 1;
}
if (addr_dataflash(addr_first) && addr_dataflash(addr_last)) {
status = dataflash_real_protect(p,addr_first,addr_last);
if (status < 0){
- printf("Bad DataFlash sector specification\n");
+ puts ("Bad DataFlash sector specification\n");
return 1;
}
printf("%sProtect %d DataFlash Sectors\n",
if ((n = abbrev_spec(argv[2], &info, §_first, §_last)) != 0) {
if (n < 0) {
- printf("Bad sector specification\n");
+ puts ("Bad sector specification\n");
return 1;
}
printf("%sProtect Flash Sectors %d-%d in Bank # %d\n",
info = &flash_info[bank-1];
if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
+ puts ("missing or unknown FLASH type\n");
return 1;
}
for (i=0; i<info->sector_count; ++i) {
printf ("%sProtected %d sectors\n",
p ? "" : "Un-", protected);
} else if (rcode == 0) {
- printf ("Error: start and/or end address"
+ puts ("Error: start and/or end address"
" not on sector boundary\n");
rcode = 1;
}
linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
if(i2c_read(chip, addr, alen, linebuf, linebytes) != 0) {
- printf("Error reading the chip.\n");
+ puts ("Error reading the chip.\n");
} else {
printf("%04x:", addr);
cp = linebuf;
printf(" %02x", *cp++);
addr++;
}
- printf(" ");
+ puts (" ");
cp = linebuf;
for (j=0; j<linebytes; j++) {
if ((*cp < 0x20) || (*cp > 0x7e))
- printf(".");
+ puts (".");
else
printf("%c", *cp);
cp++;
}
- printf("\n");
+ putc ('\n');
}
nbytes -= linebytes;
} while (nbytes > 0);
while (count-- > 0) {
if(i2c_write(chip, addr++, alen, &byte, 1) != 0) {
- printf("Error writing the chip.\n");
+ puts ("Error writing the chip.\n");
}
/*
* Wait for the write to complete. The write can take
}
if(err > 0)
{
- printf("Error reading the chip,\n");
+ puts ("Error reading the chip,\n");
} else {
printf ("%08lx\n", crc);
}
do {
printf("%08lx:", addr);
if(i2c_read(chip, addr, alen, (char *)&data, size) != 0) {
- printf("\nError reading the chip,\n");
+ puts ("\nError reading the chip,\n");
} else {
data = cpu_to_be32(data);
if(size == 1) {
reset_cmd_timeout();
#endif
if(i2c_write(chip, addr, alen, (char *)&data, size) != 0) {
- printf("Error writing the chip.\n");
+ puts ("Error writing the chip.\n");
}
#ifdef CFG_EEPROM_PAGE_WRITE_DELAY_MS
udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
int k, skip;
#endif
- printf("Valid chip addresses:");
+ puts ("Valid chip addresses:");
for(j = 0; j < 128; j++) {
#if defined(CFG_I2C_NOPROBES)
skip = 0;
printf(" %02X", j);
}
}
- printf("\n");
+ putc ('\n');
#if defined(CFG_I2C_NOPROBES)
puts ("Excluded chip addresses:");
for( k = 0; k < sizeof(i2c_no_probes); k++ )
printf(" %02X", i2c_no_probes[k] );
- puts ("\n");
+ putc ('\n');
#endif
return 0;
*/
while(1) {
if(i2c_read(chip, addr, alen, bytes, length) != 0) {
- printf("Error reading the chip.\n");
+ puts ("Error reading the chip.\n");
}
udelay(delay);
}
chip = simple_strtoul(argv[1], NULL, 16);
if(i2c_read(chip, 0, 1, data, sizeof(data)) != 0) {
- printf("No SDRAM Serial Presence Detect found.\n");
+ puts ("No SDRAM Serial Presence Detect found.\n");
return 1;
}
(data[62] >> 4) & 0x0F, data[62] & 0x0F);
printf("Bytes used 0x%02X\n", data[0]);
printf("Serial memory size 0x%02X\n", 1 << data[1]);
- printf("Memory type ");
+ puts ("Memory type ");
switch(data[2]) {
- case 2: printf("EDO\n"); break;
- case 4: printf("SDRAM\n"); break;
- default: printf("unknown\n"); break;
+ case 2: puts ("EDO\n"); break;
+ case 4: puts ("SDRAM\n"); break;
+ default: puts ("unknown\n"); break;
}
- printf("Row address bits ");
+ puts ("Row address bits ");
if((data[3] & 0x00F0) == 0) {
printf("%d\n", data[3] & 0x0F);
} else {
printf("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
}
- printf("Column address bits ");
+ puts ("Column address bits ");
if((data[4] & 0x00F0) == 0) {
printf("%d\n", data[4] & 0x0F);
} else {
}
printf("Module rows %d\n", data[5]);
printf("Module data width %d bits\n", (data[7] << 8) | data[6]);
- printf("Interface signal levels ");
+ puts ("Interface signal levels ");
switch(data[8]) {
- case 0: printf("5.0v/TTL\n"); break;
- case 1: printf("LVTTL\n"); break;
- case 2: printf("HSTL 1.5\n"); break;
- case 3: printf("SSTL 3.3\n"); break;
- case 4: printf("SSTL 2.5\n"); break;
- default: printf("unknown\n"); break;
+ case 0: puts ("5.0v/TTL\n"); break;
+ case 1: puts ("LVTTL\n"); break;
+ case 2: puts ("HSTL 1.5\n"); break;
+ case 3: puts ("SSTL 3.3\n"); break;
+ case 4: puts ("SSTL 2.5\n"); break;
+ default: puts ("unknown\n"); break;
}
printf("SDRAM cycle time %d.%d nS\n",
(data[9] >> 4) & 0x0F, data[9] & 0x0F);
printf("SDRAM access time %d.%d nS\n",
(data[10] >> 4) & 0x0F, data[10] & 0x0F);
- printf("EDC configuration ");
+ puts ("EDC configuration ");
switch(data[11]) {
- case 0: printf("None\n"); break;
- case 1: printf("Parity\n"); break;
- case 2: printf("ECC\n"); break;
- default: printf("unknown\n"); break;
+ case 0: puts ("None\n"); break;
+ case 1: puts ("Parity\n"); break;
+ case 2: puts ("ECC\n"); break;
+ default: puts ("unknown\n"); break;
}
if((data[12] & 0x80) == 0) {
- printf("No self refresh, rate ");
+ puts ("No self refresh, rate ");
} else {
- printf("Self refresh, rate ");
+ puts ("Self refresh, rate ");
}
switch(data[12] & 0x7F) {
- case 0: printf("15.625uS\n"); break;
- case 1: printf("3.9uS\n"); break;
- case 2: printf("7.8uS\n"); break;
- case 3: printf("31.3uS\n"); break;
- case 4: printf("62.5uS\n"); break;
- case 5: printf("125uS\n"); break;
- default: printf("unknown\n"); break;
+ case 0: puts ("15.625uS\n"); break;
+ case 1: puts ("3.9uS\n"); break;
+ case 2: puts ("7.8uS\n"); break;
+ case 3: puts ("31.3uS\n"); break;
+ case 4: puts ("62.5uS\n"); break;
+ case 5: puts ("125uS\n"); break;
+ default: puts ("unknown\n"); break;
}
printf("SDRAM width (primary) %d\n", data[13] & 0x7F);
if((data[13] & 0x80) != 0) {
}
printf("Min clock delay, back-to-back random column addresses %d\n",
data[15]);
- printf("Burst length(s) ");
- if(data[16] & 0x80) printf(" Page");
- if(data[16] & 0x08) printf(" 8");
- if(data[16] & 0x04) printf(" 4");
- if(data[16] & 0x02) printf(" 2");
- if(data[16] & 0x01) printf(" 1");
- printf("\n");
+ puts ("Burst length(s) ");
+ if (data[16] & 0x80) puts (" Page");
+ if (data[16] & 0x08) puts (" 8");
+ if (data[16] & 0x04) puts (" 4");
+ if (data[16] & 0x02) puts (" 2");
+ if (data[16] & 0x01) puts (" 1");
+ putc ('\n');
printf("Number of banks %d\n", data[17]);
- printf("CAS latency(s) ");
- if(data[18] & 0x80) printf(" TBD");
- if(data[18] & 0x40) printf(" 7");
- if(data[18] & 0x20) printf(" 6");
- if(data[18] & 0x10) printf(" 5");
- if(data[18] & 0x08) printf(" 4");
- if(data[18] & 0x04) printf(" 3");
- if(data[18] & 0x02) printf(" 2");
- if(data[18] & 0x01) printf(" 1");
- printf("\n");
- printf("CS latency(s) ");
- if(data[19] & 0x80) printf(" TBD");
- if(data[19] & 0x40) printf(" 6");
- if(data[19] & 0x20) printf(" 5");
- if(data[19] & 0x10) printf(" 4");
- if(data[19] & 0x08) printf(" 3");
- if(data[19] & 0x04) printf(" 2");
- if(data[19] & 0x02) printf(" 1");
- if(data[19] & 0x01) printf(" 0");
- printf("\n");
- printf("WE latency(s) ");
- if(data[20] & 0x80) printf(" TBD");
- if(data[20] & 0x40) printf(" 6");
- if(data[20] & 0x20) printf(" 5");
- if(data[20] & 0x10) printf(" 4");
- if(data[20] & 0x08) printf(" 3");
- if(data[20] & 0x04) printf(" 2");
- if(data[20] & 0x02) printf(" 1");
- if(data[20] & 0x01) printf(" 0");
- printf("\n");
- printf("Module attributes:\n");
- if(!data[21]) printf(" (none)\n");
- if(data[21] & 0x80) printf(" TBD (bit 7)\n");
- if(data[21] & 0x40) printf(" Redundant row address\n");
- if(data[21] & 0x20) printf(" Differential clock input\n");
- if(data[21] & 0x10) printf(" Registerd DQMB inputs\n");
- if(data[21] & 0x08) printf(" Buffered DQMB inputs\n");
- if(data[21] & 0x04) printf(" On-card PLL\n");
- if(data[21] & 0x02) printf(" Registered address/control lines\n");
- if(data[21] & 0x01) printf(" Buffered address/control lines\n");
- printf("Device attributes:\n");
- if(data[22] & 0x80) printf(" TBD (bit 7)\n");
- if(data[22] & 0x40) printf(" TBD (bit 6)\n");
- if(data[22] & 0x20) printf(" Upper Vcc tolerance 5%%\n");
- else printf(" Upper Vcc tolerance 10%%\n");
- if(data[22] & 0x10) printf(" Lower Vcc tolerance 5%%\n");
- else printf(" Lower Vcc tolerance 10%%\n");
- if(data[22] & 0x08) printf(" Supports write1/read burst\n");
- if(data[22] & 0x04) printf(" Supports precharge all\n");
- if(data[22] & 0x02) printf(" Supports auto precharge\n");
- if(data[22] & 0x01) printf(" Supports early RAS# precharge\n");
+ puts ("CAS latency(s) ");
+ if (data[18] & 0x80) puts (" TBD");
+ if (data[18] & 0x40) puts (" 7");
+ if (data[18] & 0x20) puts (" 6");
+ if (data[18] & 0x10) puts (" 5");
+ if (data[18] & 0x08) puts (" 4");
+ if (data[18] & 0x04) puts (" 3");
+ if (data[18] & 0x02) puts (" 2");
+ if (data[18] & 0x01) puts (" 1");
+ putc ('\n');
+ puts ("CS latency(s) ");
+ if (data[19] & 0x80) puts (" TBD");
+ if (data[19] & 0x40) puts (" 6");
+ if (data[19] & 0x20) puts (" 5");
+ if (data[19] & 0x10) puts (" 4");
+ if (data[19] & 0x08) puts (" 3");
+ if (data[19] & 0x04) puts (" 2");
+ if (data[19] & 0x02) puts (" 1");
+ if (data[19] & 0x01) puts (" 0");
+ putc ('\n');
+ puts ("WE latency(s) ");
+ if (data[20] & 0x80) puts (" TBD");
+ if (data[20] & 0x40) puts (" 6");
+ if (data[20] & 0x20) puts (" 5");
+ if (data[20] & 0x10) puts (" 4");
+ if (data[20] & 0x08) puts (" 3");
+ if (data[20] & 0x04) puts (" 2");
+ if (data[20] & 0x02) puts (" 1");
+ if (data[20] & 0x01) puts (" 0");
+ putc ('\n');
+ puts ("Module attributes:\n");
+ if (!data[21]) puts (" (none)\n");
+ if (data[21] & 0x80) puts (" TBD (bit 7)\n");
+ if (data[21] & 0x40) puts (" Redundant row address\n");
+ if (data[21] & 0x20) puts (" Differential clock input\n");
+ if (data[21] & 0x10) puts (" Registerd DQMB inputs\n");
+ if (data[21] & 0x08) puts (" Buffered DQMB inputs\n");
+ if (data[21] & 0x04) puts (" On-card PLL\n");
+ if (data[21] & 0x02) puts (" Registered address/control lines\n");
+ if (data[21] & 0x01) puts (" Buffered address/control lines\n");
+ puts ("Device attributes:\n");
+ if (data[22] & 0x80) puts (" TBD (bit 7)\n");
+ if (data[22] & 0x40) puts (" TBD (bit 6)\n");
+ if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
+ else puts (" Upper Vcc tolerance 10%\n");
+ if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
+ else puts (" Lower Vcc tolerance 10%\n");
+ if (data[22] & 0x08) puts (" Supports write1/read burst\n");
+ if (data[22] & 0x04) puts (" Supports precharge all\n");
+ if (data[22] & 0x02) puts (" Supports auto precharge\n");
+ if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
printf("SDRAM cycle time (2nd highest CAS latency) %d.%d nS\n",
(data[23] >> 4) & 0x0F, data[23] & 0x0F);
printf("SDRAM access from clock (2nd highest CAS latency) %d.%d nS\n",
printf("Row active to row active min %d nS\n", data[28]);
printf("RAS to CAS delay min %d nS\n", data[29]);
printf("Minimum RAS pulse width %d nS\n", data[30]);
- printf("Density of each row ");
- if(data[31] & 0x80) printf(" 512MByte");
- if(data[31] & 0x40) printf(" 256MByte");
- if(data[31] & 0x20) printf(" 128MByte");
- if(data[31] & 0x10) printf(" 64MByte");
- if(data[31] & 0x08) printf(" 32MByte");
- if(data[31] & 0x04) printf(" 16MByte");
- if(data[31] & 0x02) printf(" 8MByte");
- if(data[31] & 0x01) printf(" 4MByte");
- printf("\n");
+ puts ("Density of each row ");
+ if (data[31] & 0x80) puts (" 512");
+ if (data[31] & 0x40) puts (" 256");
+ if (data[31] & 0x20) puts (" 128");
+ if (data[31] & 0x10) puts (" 64");
+ if (data[31] & 0x08) puts (" 32");
+ if (data[31] & 0x04) puts (" 16");
+ if (data[31] & 0x02) puts (" 8");
+ if (data[31] & 0x01) puts (" 4");
+ puts ("MByte\n");
printf("Command and Address setup %c%d.%d nS\n",
(data[32] & 0x80) ? '-' : '+',
(data[32] >> 4) & 0x07, data[32] & 0x0F);
printf("Data signal input hold %c%d.%d nS\n",
(data[35] & 0x80) ? '-' : '+',
(data[35] >> 4) & 0x07, data[35] & 0x0F);
- printf("Manufacturer's JEDEC ID ");
+ puts ("Manufacturer's JEDEC ID ");
for(j = 64; j <= 71; j++)
printf("%02X ", data[j]);
- printf("\n");
+ putc ('\n');
printf("Manufacturing Location %02X\n", data[72]);
- printf("Manufacturer's Part Number ");
+ puts ("Manufacturer's Part Number ");
for(j = 73; j <= 90; j++)
printf("%02X ", data[j]);
- printf("\n");
+ putc ('\n');
printf("Revision Code %02X %02X\n", data[91], data[92]);
printf("Manufacturing Date %02X %02X\n", data[93], data[94]);
- printf("Assembly Serial Number ");
+ puts ("Assembly Serial Number ");
for(j = 95; j <= 98; j++)
printf("%02X ", data[j]);
- printf("\n");
+ putc ('\n');
printf("Speed rating PC%d\n",
data[126] == 0x66 ? 66 : data[126]);
#if defined(CONFIG_8xx)
printf (" MCR = %08x\n", memctl->memc_mcr);
#elif defined(CONFIG_8260)
- printf ("\n");
+ putc ('\n');
#endif
printf ("MAMR = %08x MBMR = %08x",
memctl->memc_mamr, memctl->memc_mbmr);
iopin_t iopin;
if (argc != 5) {
- printf ("iopset PORT PIN CMD VALUE\n");
+ puts ("iopset PORT PIN CMD VALUE\n");
return 1;
}
port = argv[1][0] - 'A';
printf ("I2CER = %02x I2CMR = %02x\n", i2c->i2c_i2cer, i2c->i2c_i2cmr);
if (iip == NULL)
- printf ("i2c parameter ram not allocated\n");
+ puts ("i2c parameter ram not allocated\n");
else {
printf ("RBASE = %08x TBASE = %08x\n",
iip->iic_rbase, iip->iic_tbase);
char *fsname;
char *filename = "uImage";
- ulong offset = CFG_LOAD_ADDR;
+ ulong offset = load_addr;
int size;
struct part_info *part;
}
if (argc == 3) {
offset = simple_strtoul(argv[1], NULL, 16);
+ load_addr = offset;
filename = argv[2];
}
return !(size > 0);
}
- printf("Active partition not valid\n");
+ puts ("Active partition not valid\n");
return 0;
}
return (ret == 1);
}
- printf("Active partition not valid\n");
+ puts ("Active partition not valid\n");
return 0;
}
return (ret == 1);
}
- printf("Active partition not valid\n");
+ puts ("Active partition not valid\n");
return 0;
}
if (argc >= 2) {
tmp_part = simple_strtoul(argv[1], NULL, 16);
}else{
- printf("Need partition number in argument list\n");
+ puts ("Need partition number in argument list\n");
return 0;
}
#ifdef CONFIG_HAS_DATAFLASH
}
#endif
- printf(" ");
+ puts (" ");
cp = linebuf;
for (i=0; i<linebytes; i++) {
if ((*cp < 0x20) || (*cp > 0x7e))
- printf(".");
+ putc ('.');
else
printf("%c", *cp);
cp++;
}
- printf("\n");
+ putc ('\n');
nbytes -= linebytes;
if (ctrlc()) {
rc = 1;
#ifdef CONFIG_HAS_DATAFLASH
if (addr_dataflash(addr1) | addr_dataflash(addr2)){
- printf("Comparison with DataFlash space not supported.\n\r");
+ puts ("Comparison with DataFlash space not supported.\n\r");
return 0;
}
#endif
) {
int rc;
- printf ("Copy to Flash... ");
+ puts ("Copy to Flash... ");
rc = flash_write ((uchar *)addr, dest, count*size);
if (rc != 0) {
if (mmc2info(dest)) {
int rc;
- printf ("Copy to MMC... ");
+ puts ("Copy to MMC... ");
switch (rc = mmc_write ((uchar *)addr, dest, count*size)) {
case 0:
- printf ("\n");
+ putc ('\n');
return 1;
case -1:
- printf("failed\n");
+ puts ("failed\n");
return 1;
default:
printf ("%s[%d] FIXME: rc=%d\n",__FILE__,__LINE__,rc);
if (mmc2info(addr)) {
int rc;
- printf ("Copy from MMC... ");
+ puts ("Copy from MMC... ");
switch (rc = mmc_read (addr, (uchar *)dest, count*size)) {
case 0:
- printf ("\n");
+ putc ('\n');
return 1;
case -1:
- printf("failed\n");
+ puts ("failed\n");
return 1;
default:
printf ("%s[%d] FIXME: rc=%d\n",__FILE__,__LINE__,rc);
if (addr_dataflash(dest) && !addr_dataflash(addr)){
int rc;
- printf ("Copy to DataFlash... ");
+ puts ("Copy to DataFlash... ");
rc = write_dataflash (dest, addr, count*size);
}
if (addr_dataflash(addr) && addr_dataflash(dest)){
- printf("Unsupported combination of source/destination.\n\r");
+ puts ("Unsupported combination of source/destination.\n\r");
return 1;
}
#endif
val += incr;
}
- printf("Reading...");
+ puts ("Reading...");
for (addr=start,val=pattern; addr<end; addr++) {
readback = *addr;
#ifdef CONFIG_HAS_DATAFLASH
if (addr_dataflash(addr)){
- printf("Can't modify DataFlash in place. Use cp instead.\n\r");
+ puts ("Can't modify DataFlash in place. Use cp instead.\n\r");
return 0;
}
#endif
}
} else if (op == 'r') {
if (miiphy_read (addr, reg, &data) != 0) {
- printf ("Error reading from the PHY\n");
+ puts ("Error reading from the PHY\n");
rcode = 1;
}
printf ("%04X\n", data & 0x0000FFFF);
} else if (op == 'w') {
if (miiphy_write (addr, reg, data) != 0) {
- printf ("Error writing to the PHY\n");
+ puts ("Error writing to the PHY\n");
rcode = 1;
}
} else {
* other useful registers
*/
- printf("\nSystem Configuration registers\n");
+ printf ("\nSystem Configuration registers\n"
- printf("\tIMMR\t0x%08X\n", get_immr(0));
+ "\tIMMR\t0x%08X\n", get_immr(0));
printf("\tSIUMCR\t0x%08X", sysconf->sc_siumcr);
printf("\tSYPCR\t0x%08X\n",sysconf->sc_sypcr);
printf("\tTESR\t0x%08X\tSDCR\t0x%08X\n",
sysconf->sc_tesr, sysconf->sc_sdcr);
- printf("Memory Controller Registers\n");
+ printf ("Memory Controller Registers\n"
- printf("\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl->memc_br0, memctl->memc_or0);
+ "\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl->memc_br0, memctl->memc_or0);
printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", memctl->memc_br1, memctl->memc_or1);
printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", memctl->memc_br2, memctl->memc_or2);
printf("\tBR3\t0x%08X\tOR3\t0x%08X \n", memctl->memc_br3, memctl->memc_or3);
printf("\tBR5\t0x%08X\tOR5\t0x%08X \n", memctl->memc_br5, memctl->memc_or5);
printf("\tBR6\t0x%08X\tOR6\t0x%08X \n", memctl->memc_br6, memctl->memc_or6);
printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", memctl->memc_br7, memctl->memc_or7);
- printf("\n");
-
- printf("\tmamr\t0x%08X\tmbmr\t0x%08X \n",
+ printf ("\n"
+ "\tmamr\t0x%08X\tmbmr\t0x%08X \n",
memctl->memc_mamr, memctl->memc_mbmr );
printf("\tmstat\t0x%08X\tmptpr\t0x%08X \n",
memctl->memc_mstat, memctl->memc_mptpr );
printf("\tmdr\t0x%08X \n", memctl->memc_mdr);
- printf("\nSystem Integration Timers\n");
- printf("\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n",
+ printf ("\nSystem Integration Timers\n"
+ "\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n",
timers->sit_tbscr, timers->sit_rtcsc);
printf("\tPISCR\t0x%08X \n", timers->sit_piscr);
mfdcr(uicvr),
mfdcr(uicvcr));
- printf ("\nMemory (SDRAM) Configuration\n"
+ puts ("\nMemory (SDRAM) Configuration\n"
"besra besrsa besrb besrsb bear mcopt1 rtr pmit\n");
mtdcr(memcfga,mem_besra); printf ("%08x ", mfdcr(memcfgd));
mtdcr(memcfga,mem_rtr); printf ("%08x ", mfdcr(memcfgd));
mtdcr(memcfga,mem_pmit); printf ("%08x ", mfdcr(memcfgd));
- printf ("\n"
+ puts ("\n"
"mb0cf mb1cf mb2cf mb3cf sdtr1 ecccf eccerr\n");
mtdcr(memcfga,mem_mb0cf); printf ("%08x ", mfdcr(memcfgd));
mtdcr(memcfga,mem_mb1cf); printf ("%08x ", mfdcr(memcfgd));
mfdcr(dmacr2), mfdcr(dmact2),mfdcr(dmada2), mfdcr(dmasa2), mfdcr(dmasb2),
mfdcr(dmacr3), mfdcr(dmact3),mfdcr(dmada3), mfdcr(dmasa3), mfdcr(dmasb3) );
- printf ("\n"
+ puts ("\n"
"External Bus\n"
"pbear pbesr0 pbesr1 epcr\n");
mtdcr(ebccfga,pbear); printf ("%08x ", mfdcr(ebccfgd));
mtdcr(ebccfga,pbesr1); printf ("%08x ", mfdcr(ebccfgd));
mtdcr(ebccfga,epcr); printf ("%08x ", mfdcr(ebccfgd));
- printf ("\n"
+ puts ("\n"
"pb0cr pb0ap pb1cr pb1ap pb2cr pb2ap pb3cr pb3ap\n");
mtdcr(ebccfga,pb0cr); printf ("%08x ", mfdcr(ebccfgd));
mtdcr(ebccfga,pb0ap); printf ("%08x ", mfdcr(ebccfgd));
mtdcr(ebccfga,pb3cr); printf ("%08x ", mfdcr(ebccfgd));
mtdcr(ebccfga,pb3ap); printf ("%08x ", mfdcr(ebccfgd));
- printf ("\n"
+ puts ("\n"
"pb4cr pb4ap pb5cr bp5ap pb6cr pb6ap pb7cr pb7ap\n");
mtdcr(ebccfga,pb4cr); printf ("%08x ", mfdcr(ebccfgd));
mtdcr(ebccfga,pb4ap); printf ("%08x ", mfdcr(ebccfgd));
mtdcr(ebccfga,pb7cr); printf ("%08x ", mfdcr(ebccfgd));
mtdcr(ebccfga,pb7ap); printf ("%08x ", mfdcr(ebccfgd));
- printf ("\n\n");
+ puts ("\n\n");
/* For the BUBINGA (IBM 405EP eval) but should be generically 405ep */
#elif defined(CONFIG_405EP)
printf ("\n405EP registers; MSR=%08x\n",mfmsr());
mfdcr(uicvr),
mfdcr(uicvcr));
- printf ("\nMemory (SDRAM) Configuration\n"
+ puts ("\nMemory (SDRAM) Configuration\n"
"mcopt1 rtr pmit mb0cf mb1cf sdtr1\n");
mtdcr(memcfga,mem_mcopt1); printf ("%08x ", mfdcr(memcfgd));
mfdcr(dmacr2), mfdcr(dmact2),mfdcr(dmada2), mfdcr(dmasa2), mfdcr(dmasb2),
mfdcr(dmacr3), mfdcr(dmact3),mfdcr(dmada3), mfdcr(dmasa3), mfdcr(dmasb3) );
- printf ("\n"
+ puts ("\n"
"External Bus\n"
"pbear pbesr0 pbesr1 epcr\n");
mtdcr(ebccfga,pbear); printf ("%08x ", mfdcr(ebccfgd));
mtdcr(ebccfga,pbesr1); printf ("%08x ", mfdcr(ebccfgd));
mtdcr(ebccfga,epcr); printf ("%08x ", mfdcr(ebccfgd));
- printf ("\n"
+ puts ("\n"
"pb0cr pb0ap pb1cr pb1ap pb2cr pb2ap pb3cr pb3ap\n");
mtdcr(ebccfga,pb0cr); printf ("%08x ", mfdcr(ebccfgd));
mtdcr(ebccfga,pb0ap); printf ("%08x ", mfdcr(ebccfgd));
mtdcr(ebccfga,pb3cr); printf ("%08x ", mfdcr(ebccfgd));
mtdcr(ebccfga,pb3ap); printf ("%08x ", mfdcr(ebccfgd));
- printf ("\n"
+ puts ("\n"
"pb4cr pb4ap\n");
mtdcr(ebccfga,pb4cr); printf ("%08x ", mfdcr(ebccfgd));
mtdcr(ebccfga,pb4ap); printf ("%08x ", mfdcr(ebccfgd));
- printf ("\n\n");
+ puts ("\n\n");
#elif defined(CONFIG_5xx)
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile car5xx_t *car = &immap->im_clkrst;
volatile uimb5xx_t *uimb = &immap->im_uimb;
- printf("\nSystem Configuration registers\n");
+ puts ("\nSystem Configuration registers\n");
printf("\tIMMR\t0x%08X\tSIUMCR\t0x%08X \n", get_immr(0), sysconf->sc_siumcr);
printf("\tSYPCR\t0x%08X\tSWSR\t0x%04X \n" ,sysconf->sc_sypcr, sysconf->sc_swsr);
printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X \n", sysconf->sc_sipend, sysconf->sc_simask);
printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X \n", sysconf->sc_siel, sysconf->sc_sivec);
printf("\tTESR\t0x%08X\n", sysconf->sc_tesr);
- printf("\nMemory Controller Registers\n");
+ puts ("\nMemory Controller Registers\n");
printf("\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl->memc_br0, memctl->memc_or0);
printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", memctl->memc_br1, memctl->memc_or1);
printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", memctl->memc_br2, memctl->memc_or2);
printf("\tDMBR\t0x%08X\tDMOR\t0x%08X \n", memctl->memc_dmbr, memctl->memc_dmor );
printf("\tMSTAT\t0x%08X\n", memctl->memc_mstat);
- printf("\nSystem Integration Timers\n");
+ puts ("\nSystem Integration Timers\n");
printf("\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n", timers->sit_tbscr, timers->sit_rtcsc);
printf("\tPISCR\t0x%08X \n", timers->sit_piscr);
- printf("\nClocks and Reset\n");
+ puts ("\nClocks and Reset\n");
printf("\tSCCR\t0x%08X\tPLPRCR\t0x%08X \n", car->car_sccr, car->car_plprcr);
- printf("\nU-Bus to IMB3 Bus Interface\n");
+ puts ("\nU-Bus to IMB3 Bus Interface\n");
printf("\tUMCR\t0x%08X\tUIPEND\t0x%08X \n", uimb->uimb_umcr, uimb->uimb_uipend);
- printf ("\n\n");
+ puts ("\n\n");
#endif /* CONFIG_5xx */
return 0;
}
#ifndef CFG_CONSOLE_INFO_QUIET
/* Print information */
- printf ("In: ");
+ puts ("In: ");
if (stdio_devices[stdin] == NULL) {
- printf ("No input devices available!\n");
+ puts ("No input devices available!\n");
} else {
printf ("%s\n", stdio_devices[stdin]->name);
}
- printf ("Out: ");
+ puts ("Out: ");
if (stdio_devices[stdout] == NULL) {
- printf ("No output devices available!\n");
+ puts ("No output devices available!\n");
} else {
printf ("%s\n", stdio_devices[stdout]->name);
}
- printf ("Err: ");
+ puts ("Err: ");
if (stdio_devices[stderr] == NULL) {
- printf ("No error devices available!\n");
+ puts ("No error devices available!\n");
} else {
printf ("%s\n", stdio_devices[stderr]->name);
}
#ifndef CFG_CONSOLE_INFO_QUIET
/* Print information */
- printf ("In: ");
+ puts ("In: ");
if (stdio_devices[stdin] == NULL) {
- printf ("No input devices available!\n");
+ puts ("No input devices available!\n");
} else {
printf ("%s\n", stdio_devices[stdin]->name);
}
- printf ("Out: ");
+ puts ("Out: ");
if (stdio_devices[stdout] == NULL) {
- printf ("No output devices available!\n");
+ puts ("No output devices available!\n");
} else {
printf ("%s\n", stdio_devices[stdout]->name);
}
- printf ("Err: ");
+ puts ("Err: ");
if (stdio_devices[stderr] == NULL) {
- printf ("No error devices available!\n");
+ puts ("No error devices available!\n");
} else {
printf ("%s\n", stdio_devices[stderr]->name);
}
}
# if DEBUG_BOOTKEYS
if (!abort)
- printf("key timeout\n");
+ puts ("key timeout\n");
# endif
#ifdef CONFIG_SILENT_CONSOLE
if (bootdelay >= 0) {
if (tstc()) { /* we got a key press */
(void) getc(); /* consume input */
- printf ("\b\b\b 0");
+ puts ("\b\b\b 0");
abort = 1; /* don't auto boot */
}
}
else if (len == -2) {
/* -2 means timed out, retry autoboot
*/
- printf("\nTimed out waiting for command\n");
+ puts ("\nTimed out waiting for command\n");
# ifdef CONFIG_RESET_TO_RETRY
/* Reinit board to run initialization code again */
do_reset (NULL, 0, 0, NULL);
#endif
if (len == -1)
- printf ("<INTERRUPT>\n");
+ puts ("<INTERRUPT>\n");
else
rc = run_command (lastcommand, flag);
printf ("[%s]\n", finaltoken);
#endif
if (flag & CMD_FLAG_BOOTD) {
- printf ("'bootd' recursion detected\n");
+ puts ("'bootd' recursion detected\n");
rc = -1;
continue;
}
/* check the turnaround bit: the PHY should be driving it to zero */
if(MDIO_READ != 0)
{
- /* printf("PHY didn't drive TA low\n"); */
+ /* puts ("PHY didn't drive TA low\n"); */
for(j = 0; j < 32; j++)
{
MDC(0);
if (miiphy_read (addr, PHY_PHYIDR2, &tmp) != 0) {
#ifdef DEBUG
- printf ("PHY ID register 2 read failed\n");
+ puts ("PHY ID register 2 read failed\n");
#endif
return (-1);
}
if (miiphy_read (addr, PHY_PHYIDR1, &tmp) != 0) {
#ifdef DEBUG
- printf ("PHY ID register 1 read failed\n");
+ puts ("PHY ID register 1 read failed\n");
#endif
return (-1);
}
if (miiphy_write (addr, PHY_BMCR, 0x8000) != 0) {
#ifdef DEBUG
- printf ("PHY reset failed\n");
+ puts ("PHY reset failed\n");
#endif
return (-1);
}
while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) {
if (miiphy_read (addr, PHY_BMCR, ®) != 0) {
# ifdef DEBUG
- printf ("PHY status read failed\n");
+ puts ("PHY status read failed\n");
# endif
return (-1);
}
if ((reg & 0x8000) == 0) {
return (0);
} else {
- printf ("PHY reset timed out\n");
+ puts ("PHY reset timed out\n");
return (-1);
}
return (0);
}
if (miiphy_read (addr, PHY_ANLPAR, ®)) {
- printf ("PHY speed1 read failed, assuming 10bT\n");
+ puts ("PHY speed1 read failed, assuming 10bT\n");
return (_10BASET);
}
if ((reg & PHY_ANLPAR_100) != 0) {
}
if (miiphy_read (addr, PHY_ANLPAR, ®)) {
- printf ("PHY duplex read failed, assuming half duplex\n");
+ puts ("PHY duplex read failed, assuming half duplex\n");
return (HALF);
}
unsigned short reg;
if (miiphy_read (addr, PHY_BMSR, ®)) {
- printf ("PHY_BMSR read failed, assuming no link\n");
+ puts ("PHY_BMSR read failed, assuming no link\n");
return (0);
}
{
if( bug_ctx.hw_debug_enabled == 0 )
{
- printf( "No breakpoints enabled\n" );
+ puts ( "No breakpoints enabled\n" );
return;
}
printf( "Breakpoint [%d]: ", which_bp );
if( (addr & 0x00000002) == 0 )
- printf( "NOT SET\n" );
+ puts ( "NOT SET\n" );
else
disppc( (unsigned char *)(addr & 0xFFFFFFFC), 0, 1, bedbug_puts, F_RADHEX );
}
if(( addr & 0x00000003 ) != 0 )
{
- printf( "Breakpoints must be on a 32 bit boundary\n" );
+ puts ( "Breakpoints must be on a 32 bit boundary\n" );
return 0;
}
if(( bug_ctx.find_empty ) && ( !which_bp ) &&
( which_bp = (*bug_ctx.find_empty)()) == 0 )
{
- printf( "All breakpoints in use\n" );
+ puts ( "All breakpoints in use\n" );
return 0;
}
switch (m) {
case 0x0000:
- printf ("0.2 2J24M");
+ puts ("0.2 2J24M");
break;
case 0x0010:
- printf ("A.0 K22A");
+ puts ("A.0 K22A");
break;
case 0x0011:
- printf ("A.1 1K22A-XC");
+ puts ("A.1 1K22A-XC");
break;
case 0x0001:
- printf ("B.1 1K23A");
+ puts ("B.1 1K23A");
break;
case 0x0021:
- printf ("B.2 2K23A-XC");
+ puts ("B.2 2K23A-XC");
break;
case 0x0023:
- printf ("B.3 3K23A");
+ puts ("B.3 3K23A");
break;
case 0x0024:
- printf ("C.2 6K23A");
+ puts ("C.2 6K23A");
break;
case 0x0060:
- printf ("A.0(A) 2K25A");
+ puts ("A.0(A) 2K25A");
break;
case 0x0062:
- printf ("B.1 4K25A");
+ puts ("B.1 4K25A");
break;
case 0x0064:
- printf ("C.0 5K25A");
+ puts ("C.0 5K25A");
break;
case 0x0A00:
- printf ("0.0 0K49M");
+ puts ("0.0 0K49M");
break;
case 0x0A01:
- printf ("0.1 1K49M");
+ puts ("0.1 1K49M");
break;
default:
printf ("unknown [immr=0x%04x,k=0x%04x]", m, k);
for(i=0; rtx.txbd[txIdx].cbd_sc & BD_ENET_TX_READY; i++) {
if (i >= TOUT_LOOP) {
- printf("fec: tx buffer not ready\n");
+ puts ("fec: tx buffer not ready\n");
goto out;
}
}
for(i=0; rtx.txbd[txIdx].cbd_sc & BD_ENET_TX_READY; i++) {
if (i >= TOUT_LOOP) {
- printf("fec: tx error\n");
+ puts ("fec: tx error\n");
goto out;
}
}
for (i = 0; i < nbase; i++)
printf (" Channel %d", i);
- puts ("\n");
+ putc ('\n');
while (dp < edp) {
printf (" %10u", val);
}
- puts ("\n");
+ putc ('\n');
dp++;
}
printf ("\tFirst %d rx errs:", nerr);
for (i = 0; i < nerr; i++)
printf (" %04x", ecp->rxerrs[i]);
- puts ("\n");
+ putc ('\n');
}
if ((nerr = ecp->ntxerr) > 0) {
printf ("\tFirst %d tx errs:", nerr);
for (i = 0; i < nerr; i++)
printf (" %04x", ecp->txerrs[i]);
- puts ("\n");
+ putc ('\n');
}
}
for(i=0; rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY; i++) {
if (i >= TOUT_LOOP) {
- printf("scc: tx buffer not ready\n");
+ puts ("scc: tx buffer not ready\n");
goto out;
}
}
for(i=0; rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY; i++) {
if (i >= TOUT_LOOP) {
- printf("scc: tx error\n");
+ puts ("scc: tx error\n");
goto out;
}
}
re_enable = disable_interrupts ();
- printf ("\nInterrupt-Information:\n");
- printf ("Nr Routine Arg Count\n");
+ puts ("\nInterrupt-Information:\n"
+ "Nr Routine Arg Count\n");
for (irq = 0; irq < 32; irq++)
if (irq_handlers[irq].handler != NULL)
cp = &corecnf_tab[corecnf];
- printf (CPU_ID_STR " Clock Configuration\n - Bus-to-Core Mult ");
+ puts (CPU_ID_STR " Clock Configuration\n - Bus-to-Core Mult ");
switch (cp->b2c_mult) {
case _byp:
- printf ("BYPASS");
+ puts ("BYPASS");
break;
case _off:
- printf ("OFF");
+ puts ("OFF");
break;
case _unk:
- printf ("UNKNOWN");
+ puts ("UNKNOWN");
break;
default:
printf (" - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n",
gd->vco_out, gd->scc_clk, gd->brg_clk);
- printf (" - cpu_clk %10ld, cpm_clk %10ld, bus_clk %10ld\n\n",
+ printf (" - cpu_clk %10ld, cpm_clk %10ld, bus_clk %10ld\n",
gd->cpu_clk, gd->cpm_clk, gd->bus_clk);
+
+ if (sccr & SCCR_PCI_MODE) {
+ uint pci_div;
+
+ pci_div = ( (sccr & SCCR_PCI_MODCK) ? 2 : 1) *
+ ( ( (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT) + 1);
+
+ printf (" - pci_clk %10ld\n", (gd->cpm_clk * 2) / pci_div);
+ }
+ putc ('\n');
+
return (0);
}
int cnt = 0;
unsigned long i;
- printf("Call backtrace: ");
+ puts ("Call backtrace: ");
while (sp) {
if ((uint)sp > END_OF_MEM)
break;
i = sp[1];
if (cnt++ % 7 == 0)
- printf("\n");
+ putc ('\n');
printf("%08lX ", i);
if (cnt > 32) break;
sp = (unsigned long *)*sp;
}
- printf("\n");
+ putc ('\n');
}
void show_regs(struct pt_regs * regs)
regs->msr&MSR_IR ? 1 : 0,
regs->msr&MSR_DR ? 1 : 0);
- printf("\n");
+ putc ('\n');
for (i = 0; i < 32; i++) {
if ((i % 8) == 0) {
printf("GPR%02d: ", i);
printf("%08lX ", regs->gpr[i]);
if ((i % 8) == 7) {
- printf("\n");
+ putc ('\n');
}
}
}
return;
#endif
- printf("Machine check in kernel mode.\n");
- printf("Caused by (from msr): ");
+ puts ("Machine check in kernel mode.\n"
+ "Caused by (from msr): ");
printf("regs %p ",regs);
switch( regs->msr & 0x000F0000) {
case (0x80000000>>12):
- printf("Machine check signal - probably due to mm fault\n"
+ puts ("Machine check signal - probably due to mm fault\n"
"with mmu off\n");
break;
case (0x80000000>>13):
- printf("Transfer error ack signal\n");
+ puts ("Transfer error ack signal\n");
break;
case (0x80000000>>14):
- printf("Data parity signal\n");
+ puts ("Data parity signal\n");
break;
case (0x80000000>>15):
- printf("Address parity signal\n");
+ puts ("Address parity signal\n");
break;
default:
- printf("Unknown values in msr\n");
+ puts ("Unknown values in msr\n");
}
show_regs(regs);
print_backtrace((unsigned long *)regs->gpr[1]);
flash_sect_t sect;
if (info->flash_id != FLASH_MAN_CFI) {
- printf ("Can't erase unknown flash type - aborted\n");
+ puts ("Can't erase unknown flash type - aborted\n");
return 1;
}
if ((s_first < 0) || (s_first > s_last)) {
- printf ("- no sectors to erase\n");
+ puts ("- no sectors to erase\n");
return 1;
}
if (prot) {
printf ("- Warning: %d protected sectors will not be erased!\n", prot);
} else {
- printf ("\n");
+ putc ('\n');
}
(info, sect, info->erase_blk_tout, "erase")) {
rcode = 1;
} else
- printf (".");
+ putc ('.');
}
}
- printf (" done\n");
+ puts (" done\n");
return rcode;
}
int i;
if (info->flash_id != FLASH_MAN_CFI) {
- printf ("missing or unknown FLASH type\n");
+ puts ("missing or unknown FLASH type\n");
return;
}
info->buffer_write_tout,
info->buffer_size);
- printf (" Sector Start Addresses:");
+ puts (" Sector Start Addresses:");
for (i = 0; i < info->sector_count; ++i) {
#ifdef CFG_FLASH_EMPTY_INFO
int k;
info->start[i], info->protect[i] ? " (RO)" : " ");
#endif
}
- printf ("\n");
+ putc ('\n');
return;
}
printf ("Flash %s error at address %lx\n", prompt,
info->start[sector]);
if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
- printf ("Command Sequence Error.\n");
+ puts ("Command Sequence Error.\n");
} else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
- printf ("Block Erase Error.\n");
+ puts ("Block Erase Error.\n");
retcode = ERR_NOT_ERASED;
} else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
- printf ("Locking Error\n");
+ puts ("Locking Error\n");
}
if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
- printf ("Block locked.\n");
+ puts ("Block locked.\n");
retcode = ERR_PROTECTED;
}
if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
- printf ("Vpp Low Error.\n");
+ puts ("Vpp Low Error.\n");
}
flash_write_cmd (info, sector, 0, FLASH_CMD_RESET);
break;
*(uint *) cmdbuf = __swab32 (stmpi);
break;
default:
- printf("WARNING: flash_make_cmd: unsuppported LittleEndian mode\n");
+ puts ("WARNING: flash_make_cmd: unsuppported LittleEndian mode\n");
break;
}
#endif
pL = (struct b_lists *)part->jffs2_priv;
pL->partOffset = part->offset;
offset = 0;
- printf("Scanning JFFS2 FS: ");
+ puts ("Scanning JFFS2 FS: ");
/* start at the beginning of the partition */
while (offset < max) {
dirent_crc((struct jffs2_raw_dirent *) node) &&
dirent_name_crc((struct jffs2_raw_dirent *) node)) {
if (! (counterN%100))
- printf("\b\b. ");
+ puts ("\b\b. ");
if (insert_node(&pL->dir, (u32) part->offset +
offset) == NULL)
return 0;
jffs2_1pass_fill_info(pl, &info);
for (i = 0; i < JFFS2_NUM_COMPR; i++) {
- printf("Compression: %s\n", compr_names[i]);
- printf("\tfrag count: %d\n", info.compr_info[i].num_frags);
- printf("\tcompressed sum: %d\n", info.compr_info[i].compr_sum);
- printf("\tuncompressed sum: %d\n", info.compr_info[i].decompr_sum);
+ printf ("Compression: %s\n"
+ "\tfrag count: %d\n"
+ "\tcompressed sum: %d\n"
+ "\tuncompressed sum: %d\n",
+ compr_names[i],
+ info.compr_info[i].num_frags,
+ info.compr_info[i].compr_sum,
+ info.compr_info[i].decompr_sum);
}
return 1;
}
#define FCC_PSMR_PRO ((uint)0x00400000) /* Promiscuous Enable */
#define FCC_PSMR_FCE ((uint)0x00200000) /* Flow Control Enable */
#define FCC_PSMR_RSH ((uint)0x00100000) /* Receive Short Frames */
+#define FCC_PSMR_RMII ((uint)0x00020000) /* Use RMII interface */
#define FCC_PSMR_CAM ((uint)0x00000400) /* CAM enable */
#define FCC_PSMR_BRO ((uint)0x00000200) /* Broadcast pkt discard */
#define FCC_PSMR_ENCRC ((uint)0x00000080) /* Use 32-bit CRC */
}
#ifdef DEBUG_BOOTP_EXT
- printf ("[BOOTP] Received fields: \n");
+ puts ("[BOOTP] Received fields: \n");
if (NetOurSubnetMask) {
puts ("NetOurSubnetMask : ");
print_IPaddr (NetOurSubnetMask);
}
}
#ifdef DEBUG
- printf("BootpRequest => Our Mac: ");
+ puts ("BootpRequest => Our Mac: ");
for (reg=0; reg<6; reg++) {
printf ("%x%c",
bi_enetaddr[reg],
DhcpOptionsProcess(&bp->bp_vend[4]);
BootpCopyNetParams(bp); /* Store net params from reply */
dhcp_state = BOUND;
- printf("DHCP client bound to address ");
+ puts ("DHCP client bound to address ");
print_IPaddr(NetOurIP);
- printf("\n");
+ putc ('\n');
/* Obey the 'autoload' setting */
if ((s = getenv("autoload")) != NULL) {
}
break;
default:
- printf("DHCP: INVALID STATE\n");
+ puts ("DHCP: INVALID STATE\n");
break;
}
*/
if (ctrlc()) {
eth_halt();
- printf("\nAbort\n");
+ puts ("\nAbort\n");
return (-1);
}
* the server ethernet address
*/
#ifdef ET_DEBUG
- printf("Got ARP\n");
+ puts ("Got ARP\n");
#endif
arp = (ARP_t *)ip;
if (len < ARP_HDR_SIZE) {
switch (ntohs(arp->ar_op)) {
case ARPOP_REQUEST: /* reply with our IP address */
#ifdef ET_DEBUG
- printf("Got ARP REQUEST, return our IP\n");
+ puts ("Got ARP REQUEST, return our IP\n");
#endif
NetSetEther((uchar *)et, et->et_src, PROT_ARP);
arp->ar_op = htons(ARPOP_REPLY);
/* matched waiting packet's address */
if (tmp == NetArpWaitReplyIP) {
#ifdef ET_DEBUG
- printf("Got it\n");
+ puts ("Got it\n");
#endif
/* save address for later use */
memcpy(NetArpWaitPacketMAC, &arp->ar_data[0], 6);
case PROT_RARP:
#ifdef ET_DEBUG
- printf("Got RARP\n");
+ puts ("Got RARP\n");
#endif
arp = (ARP_t *)ip;
if (len < ARP_HDR_SIZE) {
(ntohs(arp->ar_pro) != PROT_IP) ||
(arp->ar_hln != 6) || (arp->ar_pln != 4)) {
- printf("invalid RARP header\n");
+ puts ("invalid RARP header\n");
} else {
NetCopyIP(&NetOurIP, &arp->ar_data[16]);
if (NetServerIP == 0)
case PROT_IP:
#ifdef ET_DEBUG
- printf("Got IP\n");
+ puts ("Got IP\n");
#endif
if (len < IP_HDR_SIZE) {
debug ("len bad %d < %d\n", len, IP_HDR_SIZE);
return;
}
if (!NetCksumOk((uchar *)ip, IP_HDR_SIZE_NO_UDP / 2)) {
- printf("checksum bad\n");
+ puts ("checksum bad\n");
return;
}
tmp = NetReadIP(&ip->ip_dst);
print_IPaddr (NetOurGatewayIP) ;
}
}
- putc ('\n');
-
- printf ("Filename '%s/%s'.", nfs_path, nfs_filename);
+ printf ("\nFilename '%s/%s'.", nfs_path, nfs_filename);
if (NetBootFileSize) {
printf (" Size is 0x%x Bytes = ", NetBootFileSize<<9);
print_size (NetBootFileSize<<9, "");
}
- putc ('\n');
-
- printf ("Load address: 0x%lx\n", load_addr);
-
- printf ("Loading: *\b");
+ printf ("\nLoad address: 0x%lx\n"
+ "Loading: *\b", load_addr);
NetSetTimeout (NFS_TIMEOUT * CFG_HZ, NfsTimeout);
NetSetHandler (NfsHandler);
{
char *s;
#ifdef DEBUG
- printf("Got good RARP\n");
+ puts ("Got good RARP\n");
#endif
if ((s = getenv("autoload")) != NULL) {
if (*s == 'n') {
#ifdef ET_DEBUG
if (TftpState == STATE_RRQ) {
- printf("Server did not acknowledge timeout option!\n");
+ puts ("Server did not acknowledge timeout option!\n");
}
#endif
rtc_read (0x09) );
if (sec & 0x80) {
- printf ("### Warning: RTC Low Voltage - date/time not reliable\n");
+ puts ("### Warning: RTC Low Voltage - date/time not reliable\n");
}
tmp->tm_sec = bcd2bin (sec & 0x7F);
projects / platform / kernel / u-boot.git / commitdiff