+2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-arm.c: Changed ldra and strl-form mnemonics
+ to lda and stl-form for armv8.
+
2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (aarch64_archs): Rename 'armv8' to 'armv8-a'.
/* ARM V8 STRL. */
static void
-do_strlex (void)
+do_stlex (void)
{
constraint (inst.operands[0].reg == inst.operands[1].reg
|| inst.operands[0].reg == inst.operands[2].reg, BAD_OVERLAP);
}
static void
-do_t_strlex (void)
+do_t_stlex (void)
{
constraint (inst.operands[0].reg == inst.operands[1].reg
|| inst.operands[0].reg == inst.operands[2].reg, BAD_OVERLAP);
tCE("sevl", 320f005, _sevl, 0, (), noargs, t_hint),
TUE("hlt", 1000070, ba80, 1, (oIffffb), bkpt, t_hlt),
- TCE("ldraex", 1900e9f, e8d00fef, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
- TCE("ldraexd", 1b00e9f, e8d000ff, 3, (RRnpc, oRRnpc, RRnpcb),
+ TCE("ldaex", 1900e9f, e8d00fef, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
+ TCE("ldaexd", 1b00e9f, e8d000ff, 3, (RRnpc, oRRnpc, RRnpcb),
ldrexd, t_ldrexd),
- TCE("ldraexb", 1d00e9f, e8d00fcf, 2, (RRnpc,RRnpcb), rd_rn, rd_rn),
- TCE("ldraexh", 1f00e9f, e8d00fdf, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
- TCE("strlex", 1800e90, e8c00fe0, 3, (RRnpc, RRnpc, RRnpcb),
- strlex, t_strlex),
- TCE("strlexd", 1a00e90, e8c000f0, 4, (RRnpc, RRnpc, oRRnpc, RRnpcb),
+ TCE("ldaexb", 1d00e9f, e8d00fcf, 2, (RRnpc,RRnpcb), rd_rn, rd_rn),
+ TCE("ldaexh", 1f00e9f, e8d00fdf, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
+ TCE("stlex", 1800e90, e8c00fe0, 3, (RRnpc, RRnpc, RRnpcb),
+ stlex, t_stlex),
+ TCE("stlexd", 1a00e90, e8c000f0, 4, (RRnpc, RRnpc, oRRnpc, RRnpcb),
strexd, t_strexd),
- TCE("strlexb", 1c00e90, e8c00fc0, 3, (RRnpc, RRnpc, RRnpcb),
- strlex, t_strlex),
- TCE("strlexh", 1e00e90, e8c00fd0, 3, (RRnpc, RRnpc, RRnpcb),
- strlex, t_strlex),
- TCE("ldra", 1900c9f, e8d00faf, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
- TCE("ldrab", 1d00c9f, e8d00f8f, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
- TCE("ldrah", 1f00c9f, e8d00f9f, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
- TCE("strl", 180fc90, e8c00faf, 2, (RRnpc, RRnpcb), rm_rn, rd_rn),
- TCE("strlb", 1c0fc90, e8c00f8f, 2, (RRnpc, RRnpcb), rm_rn, rd_rn),
- TCE("strlh", 1e0fc90, e8c00f9f, 2, (RRnpc, RRnpcb), rm_rn, rd_rn),
+ TCE("stlexb", 1c00e90, e8c00fc0, 3, (RRnpc, RRnpc, RRnpcb),
+ stlex, t_stlex),
+ TCE("stlexh", 1e00e90, e8c00fd0, 3, (RRnpc, RRnpc, RRnpcb),
+ stlex, t_stlex),
+ TCE("lda", 1900c9f, e8d00faf, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
+ TCE("ldab", 1d00c9f, e8d00f8f, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
+ TCE("ldah", 1f00c9f, e8d00f9f, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
+ TCE("stl", 180fc90, e8c00faf, 2, (RRnpc, RRnpcb), rm_rn, rd_rn),
+ TCE("stlb", 1c0fc90, e8c00f8f, 2, (RRnpc, RRnpcb), rm_rn, rd_rn),
+ TCE("stlh", 1e0fc90, e8c00f9f, 2, (RRnpc, RRnpcb), rm_rn, rd_rn),
/* ARMv8 T32 only. */
#undef ARM_VARIANT
+2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * gas/arm/armv8-a-bad.l: Updated for changed mnemonics.
+ * gas/arm/armv8-a-bad.s: Likewise.
+ * gas/arm/armv8-a.d: Likewise.
+ * gas/arm/armv8-a.s: Likewise.
+ * gas/arm/inst.s: Added test for ldrt encoding compatibly with ldralt.
+ * gas/arm/inst.d: Updated.
+
2012-09-18 Chao-ying Fu <fu@mips.com>
* gas/mips/micromips.d: Correct the disassembly of SWXC1.
.*:29: Error: immediate value out of range -- `hlt 64'
.*:31: Warning: it blocks containing 16-bit Thumb intsructions of the following class are deprecated in ARMv8: Miscellaneous 16-bit instructions
.*:31: Error: instruction is always unconditional -- `hltne 0'
-.*:35: Error: r15 not allowed here -- `strlb pc,\[r0\]'
-.*:36: Error: r15 not allowed here -- `strlb r0,\[pc\]'
-.*:37: Error: r15 not allowed here -- `strlh pc,\[r0\]'
-.*:38: Error: r15 not allowed here -- `strlh r0,\[pc\]'
-.*:39: Error: r15 not allowed here -- `strl pc,\[r0\]'
-.*:40: Error: r15 not allowed here -- `strl r0,\[pc\]'
-.*:41: Error: r15 not allowed here -- `strlexb r1,pc,\[r0\]'
-.*:42: Error: r15 not allowed here -- `strlexb r1,r0,\[pc\]'
-.*:43: Error: r15 not allowed here -- `strlexb pc,r0,\[r1\]'
-.*:44: Error: registers may not be the same -- `strlexb r0,r0,\[r1\]'
-.*:45: Error: registers may not be the same -- `strlexb r0,r1,\[r0\]'
-.*:46: Error: r15 not allowed here -- `strlexh r1,pc,\[r0\]'
-.*:47: Error: r15 not allowed here -- `strlexh r1,r0,\[pc\]'
-.*:48: Error: r15 not allowed here -- `strlexh pc,r0,\[r1\]'
-.*:49: Error: registers may not be the same -- `strlexh r0,r0,\[r1\]'
-.*:50: Error: registers may not be the same -- `strlexh r0,r1,\[r0\]'
-.*:51: Error: r15 not allowed here -- `strlex r1,pc,\[r0\]'
-.*:52: Error: r15 not allowed here -- `strlex r1,r0,\[pc\]'
-.*:53: Error: r15 not allowed here -- `strlex pc,r0,\[r1\]'
-.*:54: Error: registers may not be the same -- `strlex r0,r0,\[r1\]'
-.*:55: Error: registers may not be the same -- `strlex r0,r1,\[r0\]'
-.*:56: Error: r14 not allowed here -- `strlexd r1,lr,\[r0\]'
-.*:57: Error: r15 not allowed here -- `strlexd r1,r0,\[pc\]'
-.*:58: Error: r15 not allowed here -- `strlexd pc,r0,\[r1\]'
-.*:59: Error: registers may not be the same -- `strlexd r0,r0,\[r1\]'
-.*:60: Error: registers may not be the same -- `strlexd r0,r2,\[r0\]'
-.*:61: Error: even register required -- `strlexd r0,r1,\[r2\]'
-.*:65: Error: r15 not allowed here -- `strlb pc,\[r0\]'
-.*:66: Error: r15 not allowed here -- `strlb r0,\[pc\]'
-.*:67: Error: r15 not allowed here -- `strlh pc,\[r0\]'
-.*:68: Error: r15 not allowed here -- `strlh r0,\[pc\]'
-.*:69: Error: r15 not allowed here -- `strl pc,\[r0\]'
-.*:70: Error: r15 not allowed here -- `strl r0,\[pc\]'
-.*:71: Error: r15 not allowed here -- `strlexb r1,pc,\[r0\]'
-.*:72: Error: r15 not allowed here -- `strlexb r1,r0,\[pc\]'
-.*:73: Error: r15 not allowed here -- `strlexb pc,r0,\[r1\]'
-.*:74: Error: registers may not be the same -- `strlexb r0,r0,\[r1\]'
-.*:75: Error: registers may not be the same -- `strlexb r0,r1,\[r0\]'
-.*:76: Error: r15 not allowed here -- `strlexh r1,pc,\[r0\]'
-.*:77: Error: r15 not allowed here -- `strlexh r1,r0,\[pc\]'
-.*:78: Error: r15 not allowed here -- `strlexh pc,r0,\[r1\]'
-.*:79: Error: registers may not be the same -- `strlexh r0,r0,\[r1\]'
-.*:80: Error: registers may not be the same -- `strlexh r0,r1,\[r0\]'
-.*:81: Error: r15 not allowed here -- `strlex r1,pc,\[r0\]'
-.*:82: Error: r15 not allowed here -- `strlex r1,r0,\[pc\]'
-.*:83: Error: r15 not allowed here -- `strlex pc,r0,\[r1\]'
-.*:84: Error: registers may not be the same -- `strlex r0,r0,\[r1\]'
-.*:85: Error: registers may not be the same -- `strlex r0,r1,\[r0\]'
-.*:87: Error: r15 not allowed here -- `strlexd r1,r0,\[pc\]'
-.*:88: Error: r15 not allowed here -- `strlexd pc,r0,\[r1\]'
-.*:89: Error: registers may not be the same -- `strlexd r0,r0,\[r1\]'
-.*:90: Error: registers may not be the same -- `strlexd r0,r2,\[r0\]'
-.*:95: Error: r15 not allowed here -- `ldrab pc,\[r0\]'
-.*:96: Error: r15 not allowed here -- `ldrab r0,\[pc\]'
-.*:97: Error: r15 not allowed here -- `ldrah pc,\[r0\]'
-.*:98: Error: r15 not allowed here -- `ldrah r0,\[pc\]'
-.*:99: Error: r15 not allowed here -- `ldra pc,\[r0\]'
-.*:100: Error: r15 not allowed here -- `ldra r0,\[pc\]'
-.*:101: Error: r15 not allowed here -- `ldraexb pc,\[r0\]'
-.*:102: Error: r15 not allowed here -- `ldraexb r0,\[pc\]'
-.*:103: Error: r15 not allowed here -- `ldraexh pc,\[r0\]'
-.*:104: Error: r15 not allowed here -- `ldraexh r0,\[pc\]'
-.*:105: Error: r15 not allowed here -- `ldraex pc,\[r0\]'
-.*:106: Error: r15 not allowed here -- `ldraex r0,\[pc\]'
-.*:107: Error: r14 not allowed here -- `ldraexd lr,\[r0\]'
-.*:108: Error: r15 not allowed here -- `ldraexd r0,\[pc\]'
-.*:109: Error: even register required -- `ldraexd r1,\[r2\]'
-.*:113: Error: r15 not allowed here -- `ldrab pc,\[r0\]'
-.*:114: Error: r15 not allowed here -- `ldrab r0,\[pc\]'
-.*:115: Error: r15 not allowed here -- `ldrah pc,\[r0\]'
-.*:116: Error: r15 not allowed here -- `ldrah r0,\[pc\]'
-.*:117: Error: r15 not allowed here -- `ldra pc,\[r0\]'
-.*:118: Error: r15 not allowed here -- `ldra r0,\[pc\]'
-.*:119: Error: r15 not allowed here -- `ldraexb pc,\[r0\]'
-.*:120: Error: r15 not allowed here -- `ldraexb r0,\[pc\]'
-.*:121: Error: r15 not allowed here -- `ldraexh pc,\[r0\]'
-.*:122: Error: r15 not allowed here -- `ldraexh r0,\[pc\]'
-.*:123: Error: r15 not allowed here -- `ldraex pc,\[r0\]'
-.*:124: Error: r15 not allowed here -- `ldraex r0,\[pc\]'
-.*:125: Error: r15 not allowed here -- `ldraexd r0,pc,\[r0\]'
-.*:126: Error: r15 not allowed here -- `ldraexd pc,r0,\[r0\]'
-.*:127: Error: r15 not allowed here -- `ldraexd r1,r0,\[pc\]'
+.*:35: Error: r15 not allowed here -- `stlb pc,\[r0\]'
+.*:36: Error: r15 not allowed here -- `stlb r0,\[pc\]'
+.*:37: Error: r15 not allowed here -- `stlh pc,\[r0\]'
+.*:38: Error: r15 not allowed here -- `stlh r0,\[pc\]'
+.*:39: Error: r15 not allowed here -- `stl pc,\[r0\]'
+.*:40: Error: r15 not allowed here -- `stl r0,\[pc\]'
+.*:41: Error: r15 not allowed here -- `stlexb r1,pc,\[r0\]'
+.*:42: Error: r15 not allowed here -- `stlexb r1,r0,\[pc\]'
+.*:43: Error: r15 not allowed here -- `stlexb pc,r0,\[r1\]'
+.*:44: Error: registers may not be the same -- `stlexb r0,r0,\[r1\]'
+.*:45: Error: registers may not be the same -- `stlexb r0,r1,\[r0\]'
+.*:46: Error: r15 not allowed here -- `stlexh r1,pc,\[r0\]'
+.*:47: Error: r15 not allowed here -- `stlexh r1,r0,\[pc\]'
+.*:48: Error: r15 not allowed here -- `stlexh pc,r0,\[r1\]'
+.*:49: Error: registers may not be the same -- `stlexh r0,r0,\[r1\]'
+.*:50: Error: registers may not be the same -- `stlexh r0,r1,\[r0\]'
+.*:51: Error: r15 not allowed here -- `stlex r1,pc,\[r0\]'
+.*:52: Error: r15 not allowed here -- `stlex r1,r0,\[pc\]'
+.*:53: Error: r15 not allowed here -- `stlex pc,r0,\[r1\]'
+.*:54: Error: registers may not be the same -- `stlex r0,r0,\[r1\]'
+.*:55: Error: registers may not be the same -- `stlex r0,r1,\[r0\]'
+.*:56: Error: r14 not allowed here -- `stlexd r1,lr,\[r0\]'
+.*:57: Error: r15 not allowed here -- `stlexd r1,r0,\[pc\]'
+.*:58: Error: r15 not allowed here -- `stlexd pc,r0,\[r1\]'
+.*:59: Error: registers may not be the same -- `stlexd r0,r0,\[r1\]'
+.*:60: Error: registers may not be the same -- `stlexd r0,r2,\[r0\]'
+.*:61: Error: even register required -- `stlexd r0,r1,\[r2\]'
+.*:65: Error: r15 not allowed here -- `stlb pc,\[r0\]'
+.*:66: Error: r15 not allowed here -- `stlb r0,\[pc\]'
+.*:67: Error: r15 not allowed here -- `stlh pc,\[r0\]'
+.*:68: Error: r15 not allowed here -- `stlh r0,\[pc\]'
+.*:69: Error: r15 not allowed here -- `stl pc,\[r0\]'
+.*:70: Error: r15 not allowed here -- `stl r0,\[pc\]'
+.*:71: Error: r15 not allowed here -- `stlexb r1,pc,\[r0\]'
+.*:72: Error: r15 not allowed here -- `stlexb r1,r0,\[pc\]'
+.*:73: Error: r15 not allowed here -- `stlexb pc,r0,\[r1\]'
+.*:74: Error: registers may not be the same -- `stlexb r0,r0,\[r1\]'
+.*:75: Error: registers may not be the same -- `stlexb r0,r1,\[r0\]'
+.*:76: Error: r15 not allowed here -- `stlexh r1,pc,\[r0\]'
+.*:77: Error: r15 not allowed here -- `stlexh r1,r0,\[pc\]'
+.*:78: Error: r15 not allowed here -- `stlexh pc,r0,\[r1\]'
+.*:79: Error: registers may not be the same -- `stlexh r0,r0,\[r1\]'
+.*:80: Error: registers may not be the same -- `stlexh r0,r1,\[r0\]'
+.*:81: Error: r15 not allowed here -- `stlex r1,pc,\[r0\]'
+.*:82: Error: r15 not allowed here -- `stlex r1,r0,\[pc\]'
+.*:83: Error: r15 not allowed here -- `stlex pc,r0,\[r1\]'
+.*:84: Error: registers may not be the same -- `stlex r0,r0,\[r1\]'
+.*:85: Error: registers may not be the same -- `stlex r0,r1,\[r0\]'
+.*:87: Error: r15 not allowed here -- `stlexd r1,r0,\[pc\]'
+.*:88: Error: r15 not allowed here -- `stlexd pc,r0,\[r1\]'
+.*:89: Error: registers may not be the same -- `stlexd r0,r0,\[r1\]'
+.*:90: Error: registers may not be the same -- `stlexd r0,r2,\[r0\]'
+.*:95: Error: r15 not allowed here -- `ldab pc,\[r0\]'
+.*:96: Error: r15 not allowed here -- `ldab r0,\[pc\]'
+.*:97: Error: r15 not allowed here -- `ldah pc,\[r0\]'
+.*:98: Error: r15 not allowed here -- `ldah r0,\[pc\]'
+.*:99: Error: r15 not allowed here -- `lda pc,\[r0\]'
+.*:100: Error: r15 not allowed here -- `lda r0,\[pc\]'
+.*:101: Error: r15 not allowed here -- `ldaexb pc,\[r0\]'
+.*:102: Error: r15 not allowed here -- `ldaexb r0,\[pc\]'
+.*:103: Error: r15 not allowed here -- `ldaexh pc,\[r0\]'
+.*:104: Error: r15 not allowed here -- `ldaexh r0,\[pc\]'
+.*:105: Error: r15 not allowed here -- `ldaex pc,\[r0\]'
+.*:106: Error: r15 not allowed here -- `ldaex r0,\[pc\]'
+.*:107: Error: r14 not allowed here -- `ldaexd lr,\[r0\]'
+.*:108: Error: r15 not allowed here -- `ldaexd r0,\[pc\]'
+.*:109: Error: even register required -- `ldaexd r1,\[r2\]'
+.*:113: Error: r15 not allowed here -- `ldab pc,\[r0\]'
+.*:114: Error: r15 not allowed here -- `ldab r0,\[pc\]'
+.*:115: Error: r15 not allowed here -- `ldah pc,\[r0\]'
+.*:116: Error: r15 not allowed here -- `ldah r0,\[pc\]'
+.*:117: Error: r15 not allowed here -- `lda pc,\[r0\]'
+.*:118: Error: r15 not allowed here -- `lda r0,\[pc\]'
+.*:119: Error: r15 not allowed here -- `ldaexb pc,\[r0\]'
+.*:120: Error: r15 not allowed here -- `ldaexb r0,\[pc\]'
+.*:121: Error: r15 not allowed here -- `ldaexh pc,\[r0\]'
+.*:122: Error: r15 not allowed here -- `ldaexh r0,\[pc\]'
+.*:123: Error: r15 not allowed here -- `ldaex pc,\[r0\]'
+.*:124: Error: r15 not allowed here -- `ldaex r0,\[pc\]'
+.*:125: Error: r15 not allowed here -- `ldaexd r0,pc,\[r0\]'
+.*:126: Error: r15 not allowed here -- `ldaexd pc,r0,\[r0\]'
+.*:127: Error: r15 not allowed here -- `ldaexd r1,r0,\[pc\]'
it ne
hltne 0
- // STRL A32
+ // STL A32
.arm
- strlb pc, [r0]
- strlb r0, [pc]
- strlh pc, [r0]
- strlh r0, [pc]
- strl pc, [r0]
- strl r0, [pc]
- strlexb r1, pc, [r0]
- strlexb r1, r0, [pc]
- strlexb pc, r0, [r1]
- strlexb r0, r0, [r1]
- strlexb r0, r1, [r0]
- strlexh r1, pc, [r0]
- strlexh r1, r0, [pc]
- strlexh pc, r0, [r1]
- strlexh r0, r0, [r1]
- strlexh r0, r1, [r0]
- strlex r1, pc, [r0]
- strlex r1, r0, [pc]
- strlex pc, r0, [r1]
- strlex r0, r0, [r1]
- strlex r0, r1, [r0]
- strlexd r1, lr, [r0]
- strlexd r1, r0, [pc]
- strlexd pc, r0, [r1]
- strlexd r0, r0, [r1]
- strlexd r0, r2, [r0]
- strlexd r0, r1, [r2]
+ stlb pc, [r0]
+ stlb r0, [pc]
+ stlh pc, [r0]
+ stlh r0, [pc]
+ stl pc, [r0]
+ stl r0, [pc]
+ stlexb r1, pc, [r0]
+ stlexb r1, r0, [pc]
+ stlexb pc, r0, [r1]
+ stlexb r0, r0, [r1]
+ stlexb r0, r1, [r0]
+ stlexh r1, pc, [r0]
+ stlexh r1, r0, [pc]
+ stlexh pc, r0, [r1]
+ stlexh r0, r0, [r1]
+ stlexh r0, r1, [r0]
+ stlex r1, pc, [r0]
+ stlex r1, r0, [pc]
+ stlex pc, r0, [r1]
+ stlex r0, r0, [r1]
+ stlex r0, r1, [r0]
+ stlexd r1, lr, [r0]
+ stlexd r1, r0, [pc]
+ stlexd pc, r0, [r1]
+ stlexd r0, r0, [r1]
+ stlexd r0, r2, [r0]
+ stlexd r0, r1, [r2]
- // STRL T32
+ // STL T32
.thumb
- strlb pc, [r0]
- strlb r0, [pc]
- strlh pc, [r0]
- strlh r0, [pc]
- strl pc, [r0]
- strl r0, [pc]
- strlexb r1, pc, [r0]
- strlexb r1, r0, [pc]
- strlexb pc, r0, [r1]
- strlexb r0, r0, [r1]
- strlexb r0, r1, [r0]
- strlexh r1, pc, [r0]
- strlexh r1, r0, [pc]
- strlexh pc, r0, [r1]
- strlexh r0, r0, [r1]
- strlexh r0, r1, [r0]
- strlex r1, pc, [r0]
- strlex r1, r0, [pc]
- strlex pc, r0, [r1]
- strlex r0, r0, [r1]
- strlex r0, r1, [r0]
- strlexd r1, lr, [r0]
- strlexd r1, r0, [pc]
- strlexd pc, r0, [r1]
- strlexd r0, r0, [r1]
- strlexd r0, r2, [r0]
- strlexd r0, r1, [r2]
+ stlb pc, [r0]
+ stlb r0, [pc]
+ stlh pc, [r0]
+ stlh r0, [pc]
+ stl pc, [r0]
+ stl r0, [pc]
+ stlexb r1, pc, [r0]
+ stlexb r1, r0, [pc]
+ stlexb pc, r0, [r1]
+ stlexb r0, r0, [r1]
+ stlexb r0, r1, [r0]
+ stlexh r1, pc, [r0]
+ stlexh r1, r0, [pc]
+ stlexh pc, r0, [r1]
+ stlexh r0, r0, [r1]
+ stlexh r0, r1, [r0]
+ stlex r1, pc, [r0]
+ stlex r1, r0, [pc]
+ stlex pc, r0, [r1]
+ stlex r0, r0, [r1]
+ stlex r0, r1, [r0]
+ stlexd r1, lr, [r0]
+ stlexd r1, r0, [pc]
+ stlexd pc, r0, [r1]
+ stlexd r0, r0, [r1]
+ stlexd r0, r2, [r0]
+ stlexd r0, r1, [r2]
- // LDRA A32
+ // LDA A32
.arm
- ldrab pc, [r0]
- ldrab r0, [pc]
- ldrah pc, [r0]
- ldrah r0, [pc]
- ldra pc, [r0]
- ldra r0, [pc]
- ldraexb pc, [r0]
- ldraexb r0, [pc]
- ldraexh pc, [r0]
- ldraexh r0, [pc]
- ldraex pc, [r0]
- ldraex r0, [pc]
- ldraexd lr, [r0]
- ldraexd r0, [pc]
- ldraexd r1, [r2]
+ ldab pc, [r0]
+ ldab r0, [pc]
+ ldah pc, [r0]
+ ldah r0, [pc]
+ lda pc, [r0]
+ lda r0, [pc]
+ ldaexb pc, [r0]
+ ldaexb r0, [pc]
+ ldaexh pc, [r0]
+ ldaexh r0, [pc]
+ ldaex pc, [r0]
+ ldaex r0, [pc]
+ ldaexd lr, [r0]
+ ldaexd r0, [pc]
+ ldaexd r1, [r2]
- // LDRA T32
+ // LDA T32
.thumb
- ldrab pc, [r0]
- ldrab r0, [pc]
- ldrah pc, [r0]
- ldrah r0, [pc]
- ldra pc, [r0]
- ldra r0, [pc]
- ldraexb pc, [r0]
- ldraexb r0, [pc]
- ldraexh pc, [r0]
- ldraexh r0, [pc]
- ldraex pc, [r0]
- ldraex r0, [pc]
- ldraexd r0, pc, [r0]
- ldraexd pc, r0, [r0]
- ldraexd r1, r0, [pc]
+ ldab pc, [r0]
+ ldab r0, [pc]
+ ldah pc, [r0]
+ ldah r0, [pc]
+ lda pc, [r0]
+ lda r0, [pc]
+ ldaexb pc, [r0]
+ ldaexb r0, [pc]
+ ldaexh pc, [r0]
+ ldaexh r0, [pc]
+ ldaex pc, [r0]
+ ldaex r0, [pc]
+ ldaexd r0, pc, [r0]
+ ldaexd pc, r0, [r0]
+ ldaexd r1, r0, [pc]
0[0-9a-f]+ <[^>]+> e1000070 hlt 0x0000
0[0-9a-f]+ <[^>]+> e100007f hlt 0x000f
0[0-9a-f]+ <[^>]+> e10fff70 hlt 0xfff0
-0[0-9a-f]+ <[^>]+> e1c0fc90 strlb r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e1c1fc91 strlb r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e1cefc9e strlb lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e1e0fc90 strlh r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e1e1fc91 strlh r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e1eefc9e strlh lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e180fc90 strl r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e181fc91 strl r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e18efc9e strl lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e1ce0e91 strlexb r0, r1, \[lr\]
-0[0-9a-f]+ <[^>]+> e1c01e9e strlexb r1, lr, \[r0\]
-0[0-9a-f]+ <[^>]+> e1c1ee90 strlexb lr, r0, \[r1\]
-0[0-9a-f]+ <[^>]+> e1ee0e91 strlexh r0, r1, \[lr\]
-0[0-9a-f]+ <[^>]+> e1e01e9e strlexh r1, lr, \[r0\]
-0[0-9a-f]+ <[^>]+> e1e1ee90 strlexh lr, r0, \[r1\]
-0[0-9a-f]+ <[^>]+> e18e0e91 strlex r0, r1, \[lr\]
-0[0-9a-f]+ <[^>]+> e1801e9e strlex r1, lr, \[r0\]
-0[0-9a-f]+ <[^>]+> e181ee90 strlex lr, r0, \[r1\]
-0[0-9a-f]+ <[^>]+> e1ae0e92 strlexd r0, r2, r3, \[lr\]
-0[0-9a-f]+ <[^>]+> e1a01e9c strlexd r1, ip, sp, \[r0\]
-0[0-9a-f]+ <[^>]+> e1a1ee90 strlexd lr, r0, r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e1d00c9f ldrab r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e1d11c9f ldrab r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e1deec9f ldrab lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e1f00c9f ldraexh r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e1f11c9f ldraexh r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e1feec9f ldraexh lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e1900c9f ldra r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e1911c9f ldra r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e19eec9f ldra lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e1d00e9f ldraexb r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e1d11e9f ldraexb r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e1deee9f ldraexb lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e1f00e9f ldraexh r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e1f11e9f ldraexh r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e1feee9f ldraexh lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e1900e9f ldraex r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e1911e9f ldraex r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e19eee9f ldraex lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e1b00e9f ldraexd r0, r1, \[r0\]
-0[0-9a-f]+ <[^>]+> e1b12e9f ldraexd r2, r3, \[r1\]
-0[0-9a-f]+ <[^>]+> e1bece9f ldraexd ip, sp, \[lr\]
+0[0-9a-f]+ <[^>]+> e1c0fc90 stlb r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e1c1fc91 stlb r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e1cefc9e stlb lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e1e0fc90 stlh r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e1e1fc91 stlh r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e1eefc9e stlh lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e180fc90 stl r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e181fc91 stl r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e18efc9e stl lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e1ce0e91 stlexb r0, r1, \[lr\]
+0[0-9a-f]+ <[^>]+> e1c01e9e stlexb r1, lr, \[r0\]
+0[0-9a-f]+ <[^>]+> e1c1ee90 stlexb lr, r0, \[r1\]
+0[0-9a-f]+ <[^>]+> e1ee0e91 stlexh r0, r1, \[lr\]
+0[0-9a-f]+ <[^>]+> e1e01e9e stlexh r1, lr, \[r0\]
+0[0-9a-f]+ <[^>]+> e1e1ee90 stlexh lr, r0, \[r1\]
+0[0-9a-f]+ <[^>]+> e18e0e91 stlex r0, r1, \[lr\]
+0[0-9a-f]+ <[^>]+> e1801e9e stlex r1, lr, \[r0\]
+0[0-9a-f]+ <[^>]+> e181ee90 stlex lr, r0, \[r1\]
+0[0-9a-f]+ <[^>]+> e1ae0e92 stlexd r0, r2, r3, \[lr\]
+0[0-9a-f]+ <[^>]+> e1a01e9c stlexd r1, ip, sp, \[r0\]
+0[0-9a-f]+ <[^>]+> e1a1ee90 stlexd lr, r0, r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e1d00c9f ldab r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e1d11c9f ldab r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e1deec9f ldab lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e1f00c9f ldaexh r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e1f11c9f ldaexh r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e1feec9f ldaexh lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e1900c9f lda r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e1911c9f lda r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e19eec9f lda lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e1d00e9f ldaexb r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e1d11e9f ldaexb r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e1deee9f ldaexb lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e1f00e9f ldaexh r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e1f11e9f ldaexh r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e1feee9f ldaexh lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e1900e9f ldaex r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e1911e9f ldaex r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e19eee9f ldaex lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e1b00e9f ldaexd r0, r1, \[r0\]
+0[0-9a-f]+ <[^>]+> e1b12e9f ldaexd r2, r3, \[r1\]
+0[0-9a-f]+ <[^>]+> e1bece9f ldaexd ip, sp, \[lr\]
0[0-9a-f]+ <[^>]+> bf50 sevl
0[0-9a-f]+ <[^>]+> bf50 sevl
0[0-9a-f]+ <[^>]+> f3af 8005 sevl.w
0[0-9a-f]+ <[^>]+> f78f 8003 dcps3
0[0-9a-f]+ <[^>]+> ba80 hlt 0x0000
0[0-9a-f]+ <[^>]+> babf hlt 0x003f
-0[0-9a-f]+ <[^>]+> e8c0 0f8f strlb r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e8c1 1f8f strlb r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e8ce ef8f strlb lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e8c0 0f9f strlh r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e8c1 1f9f strlh r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e8ce ef9f strlh lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e8c0 0faf strl r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e8c1 1faf strl r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e8ce efaf strl lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e8ce 1fc0 strlexb r0, r1, \[lr\]
-0[0-9a-f]+ <[^>]+> e8c0 efc1 strlexb r1, lr, \[r0\]
-0[0-9a-f]+ <[^>]+> e8c1 0fce strlexb lr, r0, \[r1\]
-0[0-9a-f]+ <[^>]+> e8ce 1fd0 strlexh r0, r1, \[lr\]
-0[0-9a-f]+ <[^>]+> e8c0 efd1 strlexh r1, lr, \[r0\]
-0[0-9a-f]+ <[^>]+> e8c1 0fde strlexh lr, r0, \[r1\]
-0[0-9a-f]+ <[^>]+> e8ce 1fe0 strlex r0, r1, \[lr\]
-0[0-9a-f]+ <[^>]+> e8c0 efe1 strlex r1, lr, \[r0\]
-0[0-9a-f]+ <[^>]+> e8c1 0fee strlex lr, r0, \[r1\]
-0[0-9a-f]+ <[^>]+> e8ce 11f0 strlexd r0, r1, r1, \[lr\]
-0[0-9a-f]+ <[^>]+> e8c0 eef1 strlexd r1, lr, lr, \[r0\]
-0[0-9a-f]+ <[^>]+> e8c1 00fe strlexd lr, r0, r0, \[r1\]
-0[0-9a-f]+ <[^>]+> e8d0 0f8f ldrab r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e8d1 1f8f ldrab r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e8de ef8f ldrab lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e8d0 0f9f ldrah r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e8d1 1f9f ldrah r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e8de ef9f ldrah lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e8d0 0faf ldra r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e8d1 1faf ldra r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e8de efaf ldra lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e8d0 0fcf ldraexb r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e8d1 1fcf ldraexb r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e8de efcf ldraexb lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e8d0 0fdf ldraexh r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e8d1 1fdf ldraexh r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e8de efdf ldraexh lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e8d0 0fef ldraex r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e8d1 1fef ldraex r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e8de efef ldraex lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e8d0 01ff ldraexd r0, r1, \[r0\]
-0[0-9a-f]+ <[^>]+> e8d1 1eff ldraexd r1, lr, \[r1\]
-0[0-9a-f]+ <[^>]+> e8de e0ff ldraexd lr, r0, \[lr\]
+0[0-9a-f]+ <[^>]+> e8c0 0f8f stlb r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e8c1 1f8f stlb r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e8ce ef8f stlb lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e8c0 0f9f stlh r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e8c1 1f9f stlh r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e8ce ef9f stlh lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e8c0 0faf stl r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e8c1 1faf stl r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e8ce efaf stl lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e8ce 1fc0 stlexb r0, r1, \[lr\]
+0[0-9a-f]+ <[^>]+> e8c0 efc1 stlexb r1, lr, \[r0\]
+0[0-9a-f]+ <[^>]+> e8c1 0fce stlexb lr, r0, \[r1\]
+0[0-9a-f]+ <[^>]+> e8ce 1fd0 stlexh r0, r1, \[lr\]
+0[0-9a-f]+ <[^>]+> e8c0 efd1 stlexh r1, lr, \[r0\]
+0[0-9a-f]+ <[^>]+> e8c1 0fde stlexh lr, r0, \[r1\]
+0[0-9a-f]+ <[^>]+> e8ce 1fe0 stlex r0, r1, \[lr\]
+0[0-9a-f]+ <[^>]+> e8c0 efe1 stlex r1, lr, \[r0\]
+0[0-9a-f]+ <[^>]+> e8c1 0fee stlex lr, r0, \[r1\]
+0[0-9a-f]+ <[^>]+> e8ce 11f0 stlexd r0, r1, r1, \[lr\]
+0[0-9a-f]+ <[^>]+> e8c0 eef1 stlexd r1, lr, lr, \[r0\]
+0[0-9a-f]+ <[^>]+> e8c1 00fe stlexd lr, r0, r0, \[r1\]
+0[0-9a-f]+ <[^>]+> e8d0 0f8f ldab r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e8d1 1f8f ldab r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e8de ef8f ldab lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e8d0 0f9f ldah r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e8d1 1f9f ldah r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e8de ef9f ldah lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e8d0 0faf lda r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e8d1 1faf lda r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e8de efaf lda lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e8d0 0fcf ldaexb r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e8d1 1fcf ldaexb r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e8de efcf ldaexb lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e8d0 0fdf ldaexh r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e8d1 1fdf ldaexh r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e8de efdf ldaexh lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e8d0 0fef ldaex r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e8d1 1fef ldaex r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e8de efef ldaex lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e8d0 01ff ldaexd r0, r1, \[r0\]
+0[0-9a-f]+ <[^>]+> e8d1 1eff ldaexd r1, lr, \[r1\]
+0[0-9a-f]+ <[^>]+> e8de e0ff ldaexd lr, r0, \[lr\]
hlt 0x0
hlt 0xf
hlt 0xfff0
- strlb r0, [r0]
- strlb r1, [r1]
- strlb r14, [r14]
- strlh r0, [r0]
- strlh r1, [r1]
- strlh r14, [r14]
- strl r0, [r0]
- strl r1, [r1]
- strl r14, [r14]
- strlexb r0, r1, [r14]
- strlexb r1, r14, [r0]
- strlexb r14, r0, [r1]
- strlexh r0, r1, [r14]
- strlexh r1, r14, [r0]
- strlexh r14, r0, [r1]
- strlex r0, r1, [r14]
- strlex r1, r14, [r0]
- strlex r14, r0, [r1]
- strlexd r0, r2, r3, [r14]
- strlexd r1, r12, r13, [r0]
- strlexd r14, r0, r1, [r1]
- ldrab r0, [r0]
- ldrab r1, [r1]
- ldrab r14, [r14]
- ldrah r0, [r0]
- ldrah r1, [r1]
- ldrah r14, [r14]
- ldra r0, [r0]
- ldra r1, [r1]
- ldra r14, [r14]
- ldraexb r0, [r0]
- ldraexb r1, [r1]
- ldraexb r14, [r14]
- ldraexh r0, [r0]
- ldraexh r1, [r1]
- ldraexh r14, [r14]
- ldraex r0, [r0]
- ldraex r1, [r1]
- ldraex r14, [r14]
- ldraexd r0, r1, [r0]
- ldraexd r2, r3, [r1]
- ldraexd r12, r13, [r14]
+ stlb r0, [r0]
+ stlb r1, [r1]
+ stlb r14, [r14]
+ stlh r0, [r0]
+ stlh r1, [r1]
+ stlh r14, [r14]
+ stl r0, [r0]
+ stl r1, [r1]
+ stl r14, [r14]
+ stlexb r0, r1, [r14]
+ stlexb r1, r14, [r0]
+ stlexb r14, r0, [r1]
+ stlexh r0, r1, [r14]
+ stlexh r1, r14, [r0]
+ stlexh r14, r0, [r1]
+ stlex r0, r1, [r14]
+ stlex r1, r14, [r0]
+ stlex r14, r0, [r1]
+ stlexd r0, r2, r3, [r14]
+ stlexd r1, r12, r13, [r0]
+ stlexd r14, r0, r1, [r1]
+ ldab r0, [r0]
+ ldab r1, [r1]
+ ldab r14, [r14]
+ ldah r0, [r0]
+ ldah r1, [r1]
+ ldah r14, [r14]
+ lda r0, [r0]
+ lda r1, [r1]
+ lda r14, [r14]
+ ldaexb r0, [r0]
+ ldaexb r1, [r1]
+ ldaexb r14, [r14]
+ ldaexh r0, [r0]
+ ldaexh r1, [r1]
+ ldaexh r14, [r14]
+ ldaex r0, [r0]
+ ldaex r1, [r1]
+ ldaex r14, [r14]
+ ldaexd r0, r1, [r0]
+ ldaexd r2, r3, [r1]
+ ldaexd r12, r13, [r14]
.thumb
.thumb_func
dcps3
hlt 0
hlt 63
- strlb r0, [r0]
- strlb r1, [r1]
- strlb r14, [r14]
- strlh r0, [r0]
- strlh r1, [r1]
- strlh r14, [r14]
- strl r0, [r0]
- strl r1, [r1]
- strl r14, [r14]
- strlexb r0, r1, [r14]
- strlexb r1, r14, [r0]
- strlexb r14, r0, [r1]
- strlexh r0, r1, [r14]
- strlexh r1, r14, [r0]
- strlexh r14, r0, [r1]
- strlex r0, r1, [r14]
- strlex r1, r14, [r0]
- strlex r14, r0, [r1]
- strlexd r0, r1, r1, [r14]
- strlexd r1, r14, r14, [r0]
- strlexd r14, r0, r0, [r1]
- ldrab r0, [r0]
- ldrab r1, [r1]
- ldrab r14, [r14]
- ldrah r0, [r0]
- ldrah r1, [r1]
- ldrah r14, [r14]
- ldra r0, [r0]
- ldra r1, [r1]
- ldra r14, [r14]
- ldraexb r0, [r0]
- ldraexb r1, [r1]
- ldraexb r14, [r14]
- ldraexh r0, [r0]
- ldraexh r1, [r1]
- ldraexh r14, [r14]
- ldraex r0, [r0]
- ldraex r1, [r1]
- ldraex r14, [r14]
- ldraexd r0, r1, [r0]
- ldraexd r1, r14, [r1]
- ldraexd r14, r0, [r14]
+ stlb r0, [r0]
+ stlb r1, [r1]
+ stlb r14, [r14]
+ stlh r0, [r0]
+ stlh r1, [r1]
+ stlh r14, [r14]
+ stl r0, [r0]
+ stl r1, [r1]
+ stl r14, [r14]
+ stlexb r0, r1, [r14]
+ stlexb r1, r14, [r0]
+ stlexb r14, r0, [r1]
+ stlexh r0, r1, [r14]
+ stlexh r1, r14, [r0]
+ stlexh r14, r0, [r1]
+ stlex r0, r1, [r14]
+ stlex r1, r14, [r0]
+ stlex r14, r0, [r1]
+ stlexd r0, r1, r1, [r14]
+ stlexd r1, r14, r14, [r0]
+ stlexd r14, r0, r0, [r1]
+ ldab r0, [r0]
+ ldab r1, [r1]
+ ldab r14, [r14]
+ ldah r0, [r0]
+ ldah r1, [r1]
+ ldah r14, [r14]
+ lda r0, [r0]
+ lda r1, [r1]
+ lda r14, [r14]
+ ldaexb r0, [r0]
+ ldaexb r1, [r1]
+ ldaexb r14, [r14]
+ ldaexh r0, [r0]
+ ldaexh r1, [r1]
+ ldaexh r14, [r14]
+ ldaex r0, [r0]
+ ldaex r1, [r1]
+ ldaex r14, [r14]
+ ldaexd r0, r1, [r0]
+ ldaexd r1, r14, [r1]
+ ldaexd r14, r0, [r14]
0+2e4 <[^>]*> e1a01fe2 ? ror r1, r2, #31
0+2e8 <[^>]*> e1a01372 ? ror r1, r2, r3
0+2ec <[^>]*> e1a01062 ? rrx r1, r2
+0+2f0 <[^>]*> e6b21003 ? ldrt r1, \[r2\], r3
mov r1, r2, ROR #31
mov r1, r2, ROR r3
mov r1, r2, RRX
-
\ No newline at end of file
+ ldralt r1, [r2], r3
+2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * arm-dis.c: Changed ldra and strl-form mnemonics
+ to lda and stl-form.
+
2012-09-18 Chao-ying Fu <fu@mips.com>
* micromips-opc.c (micromips_opcodes): Correct the encoding of
/* V8 instructions. */
{ARM_EXT_V8, 0x0320f005, 0x0fffffff, "sevl"},
{ARM_EXT_V8, 0xe1000070, 0xfff000f0, "hlt\t0x%16-19X%12-15X%8-11X%0-3X"},
- {ARM_EXT_V8, 0x01800e90, 0x0ff00ff0, "strlex%c\t%12-15r, %0-3r, [%16-19R]"},
- {ARM_EXT_V8, 0x01900e9f, 0x0ff00fff, "ldraex%c\t%12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0x01a00e90, 0x0ff00ff0, "strlexd%c\t%12-15r, %0-3r, %0-3T, [%16-19R]"},
- {ARM_EXT_V8, 0x01b00e9f, 0x0ff00fff, "ldraexd%c\t%12-15r, %12-15T, [%16-19R]"},
- {ARM_EXT_V8, 0x01c00e90, 0x0ff00ff0, "strlexb%c\t%12-15r, %0-3r, [%16-19R]"},
- {ARM_EXT_V8, 0x01d00e9f, 0x0ff00fff, "ldraexb%c\t%12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0x01e00e90, 0x0ff00ff0, "strlexh%c\t%12-15r, %0-3r, [%16-19R]"},
- {ARM_EXT_V8, 0x01f00e9f, 0x0ff00fff, "ldraexh%c\t%12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0x0180fc90, 0x0ff0fff0, "strl%c\t%0-3r, [%16-19R]"},
- {ARM_EXT_V8, 0x01900c9f, 0x0ff00fff, "ldra%c\t%12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0x01c0fc90, 0x0ff0fff0, "strlb%c\t%0-3r, [%16-19R]"},
- {ARM_EXT_V8, 0x01d00c9f, 0x0ff00fff, "ldrab%c\t%12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0x01e0fc90, 0x0ff0fff0, "strlh%c\t%0-3r, [%16-19R]"},
- {ARM_EXT_V8, 0x01f00c9f, 0x0ff00fff, "ldraexh%c\t%12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0x01800e90, 0x0ff00ff0, "stlex%c\t%12-15r, %0-3r, [%16-19R]"},
+ {ARM_EXT_V8, 0x01900e9f, 0x0ff00fff, "ldaex%c\t%12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0x01a00e90, 0x0ff00ff0, "stlexd%c\t%12-15r, %0-3r, %0-3T, [%16-19R]"},
+ {ARM_EXT_V8, 0x01b00e9f, 0x0ff00fff, "ldaexd%c\t%12-15r, %12-15T, [%16-19R]"},
+ {ARM_EXT_V8, 0x01c00e90, 0x0ff00ff0, "stlexb%c\t%12-15r, %0-3r, [%16-19R]"},
+ {ARM_EXT_V8, 0x01d00e9f, 0x0ff00fff, "ldaexb%c\t%12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0x01e00e90, 0x0ff00ff0, "stlexh%c\t%12-15r, %0-3r, [%16-19R]"},
+ {ARM_EXT_V8, 0x01f00e9f, 0x0ff00fff, "ldaexh%c\t%12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0x0180fc90, 0x0ff0fff0, "stl%c\t%0-3r, [%16-19R]"},
+ {ARM_EXT_V8, 0x01900c9f, 0x0ff00fff, "lda%c\t%12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0x01c0fc90, 0x0ff0fff0, "stlb%c\t%0-3r, [%16-19R]"},
+ {ARM_EXT_V8, 0x01d00c9f, 0x0ff00fff, "ldab%c\t%12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0x01e0fc90, 0x0ff0fff0, "stlh%c\t%0-3r, [%16-19R]"},
+ {ARM_EXT_V8, 0x01f00c9f, 0x0ff00fff, "ldaexh%c\t%12-15r, [%16-19R]"},
/* Virtualization Extension instructions. */
{ARM_EXT_VIRT, 0x0160006e, 0x0fffffff, "eret%c"},
/* V8 instructions. */
{ARM_EXT_V8, 0xf3af8005, 0xffffffff, "sevl%c.w"},
{ARM_EXT_V8, 0xf78f8000, 0xfffffffc, "dcps%0-1d"},
- {ARM_EXT_V8, 0xe8c00f8f, 0xfff00fff, "strlb%c\t%12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0xe8c00f9f, 0xfff00fff, "strlh%c\t%12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0xe8c00faf, 0xfff00fff, "strl%c\t%12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0xe8c00fc0, 0xfff00ff0, "strlexb%c\t%0-3r, %12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0xe8c00fd0, 0xfff00ff0, "strlexh%c\t%0-3r, %12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0xe8c00fe0, 0xfff00ff0, "strlex%c\t%0-3r, %12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0xe8c000f0, 0xfff000f0, "strlexd%c\t%0-3r, %12-15r, %8-11r, [%16-19R]"},
- {ARM_EXT_V8, 0xe8d00f8f, 0xfff00fff, "ldrab%c\t%12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0xe8d00f9f, 0xfff00fff, "ldrah%c\t%12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0xe8d00faf, 0xfff00fff, "ldra%c\t%12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0xe8d00fcf, 0xfff00fff, "ldraexb%c\t%12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0xe8d00fdf, 0xfff00fff, "ldraexh%c\t%12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0xe8d00fef, 0xfff00fff, "ldraex%c\t%12-15r, [%16-19R]"},
- {ARM_EXT_V8, 0xe8d000ff, 0xfff000ff, "ldraexd%c\t%12-15r, %8-11r, [%16-19R]"},
+ {ARM_EXT_V8, 0xe8c00f8f, 0xfff00fff, "stlb%c\t%12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0xe8c00f9f, 0xfff00fff, "stlh%c\t%12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0xe8c00faf, 0xfff00fff, "stl%c\t%12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0xe8c00fc0, 0xfff00ff0, "stlexb%c\t%0-3r, %12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0xe8c00fd0, 0xfff00ff0, "stlexh%c\t%0-3r, %12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0xe8c00fe0, 0xfff00ff0, "stlex%c\t%0-3r, %12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0xe8c000f0, 0xfff000f0, "stlexd%c\t%0-3r, %12-15r, %8-11r, [%16-19R]"},
+ {ARM_EXT_V8, 0xe8d00f8f, 0xfff00fff, "ldab%c\t%12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0xe8d00f9f, 0xfff00fff, "ldah%c\t%12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0xe8d00faf, 0xfff00fff, "lda%c\t%12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0xe8d00fcf, 0xfff00fff, "ldaexb%c\t%12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0xe8d00fdf, 0xfff00fff, "ldaexh%c\t%12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0xe8d00fef, 0xfff00fff, "ldaex%c\t%12-15r, [%16-19R]"},
+ {ARM_EXT_V8, 0xe8d000ff, 0xfff000ff, "ldaexd%c\t%12-15r, %8-11r, [%16-19R]"},
/* V7 instructions. */
{ARM_EXT_V7, 0xf910f000, 0xff70f000, "pli%c\t%a"},
projects / external / binutils.git / commitdiff