/* Definitions of target machine for GNU compiler. TMS320C[34]x
- Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999
+ Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2003
Free Software Foundation, Inc.
Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz)
#ifndef GCC_C4X_PROTOS_H
#define GCC_C4X_PROTOS_H
-extern void c4x_override_options PARAMS ((void));
+extern void c4x_override_options (void);
-extern void c4x_optimization_options PARAMS ((int, int));
+extern void c4x_optimization_options (int, int);
-extern void c4x_output_ascii PARAMS ((FILE *, const char *, int));
+extern void c4x_output_ascii (FILE *, const char *, int);
-extern int c4x_interrupt_function_p PARAMS ((void));
+extern int c4x_interrupt_function_p (void);
-extern void c4x_expand_prologue PARAMS ((void));
+extern void c4x_expand_prologue (void);
-extern void c4x_expand_epilogue PARAMS ((void));
+extern void c4x_expand_epilogue (void);
-extern int c4x_null_epilogue_p PARAMS ((void));
+extern int c4x_null_epilogue_p (void);
extern void c4x_global_label (const char *);
extern void c4x_external_ref (const char *);
#ifdef TREE_CODE
-extern void c4x_function_arg_advance PARAMS ((CUMULATIVE_ARGS *,
- enum machine_mode, tree, int));
+extern void c4x_function_arg_advance (CUMULATIVE_ARGS *,
+ enum machine_mode, tree, int);
-extern struct rtx_def *c4x_function_arg PARAMS ((CUMULATIVE_ARGS *,
- enum machine_mode, tree,
- int));
+extern struct rtx_def *c4x_function_arg (CUMULATIVE_ARGS *,
+ enum machine_mode, tree, int);
#endif /* TREE_CODE */
#if defined(RTX_CODE) && defined(TREE_CODE)
-extern void c4x_init_cumulative_args PARAMS ((CUMULATIVE_ARGS *c, tree, rtx));
+extern void c4x_init_cumulative_args (CUMULATIVE_ARGS *c, tree, rtx);
-extern struct rtx_def *c4x_va_arg PARAMS ((tree, tree));
+extern struct rtx_def *c4x_va_arg (tree, tree);
-extern rtx c4x_expand_builtin PARAMS ((tree, rtx, rtx,
- enum machine_mode, int));
+extern rtx c4x_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
-extern void c4x_init_builtins PARAMS ((void));
+extern void c4x_init_builtins (void);
#endif /* TREE_CODE and RTX_CODE*/
#ifdef RTX_CODE
-extern struct rtx_def *c4x_gen_compare_reg PARAMS ((enum rtx_code, rtx, rtx));
+extern struct rtx_def *c4x_gen_compare_reg (enum rtx_code, rtx, rtx);
-extern int c4x_check_legit_addr PARAMS ((enum machine_mode, rtx, int));
+extern int c4x_check_legit_addr (enum machine_mode, rtx, int);
-extern int c4x_hard_regno_mode_ok PARAMS ((unsigned int, enum machine_mode));
+extern int c4x_hard_regno_mode_ok (unsigned int, enum machine_mode);
-extern int c4x_hard_regno_rename_ok PARAMS ((unsigned int, unsigned int));
+extern int c4x_hard_regno_rename_ok (unsigned int, unsigned int);
-extern struct rtx_def *c4x_legitimize_address PARAMS ((rtx,
- enum machine_mode));
+extern struct rtx_def *c4x_legitimize_address (rtx, enum machine_mode);
-extern void c4x_print_operand PARAMS ((FILE *, rtx, int));
+extern void c4x_print_operand (FILE *, rtx, int);
-extern void c4x_print_operand_address PARAMS ((FILE *, rtx));
+extern void c4x_print_operand_address (FILE *, rtx);
-extern enum reg_class c4x_preferred_reload_class PARAMS ((rtx,
- enum reg_class));
+extern enum reg_class c4x_preferred_reload_class (rtx, enum reg_class);
-extern struct rtx_def *c4x_operand_subword PARAMS ((rtx, int, int,
- enum machine_mode));
+extern struct rtx_def *c4x_operand_subword (rtx, int, int, enum machine_mode);
-extern char *c4x_output_cbranch PARAMS ((const char *, rtx));
+extern char *c4x_output_cbranch (const char *, rtx);
-extern int c4x_label_conflict PARAMS ((rtx, rtx, rtx));
+extern int c4x_label_conflict (rtx, rtx, rtx);
-extern int c4x_address_conflict PARAMS ((rtx, rtx, int, int));
+extern int c4x_address_conflict (rtx, rtx, int, int);
-extern void c4x_rptb_insert PARAMS ((rtx insn));
+extern void c4x_rptb_insert (rtx insn);
-extern int c4x_rptb_nop_p PARAMS ((rtx));
+extern int c4x_rptb_nop_p (rtx);
-extern int c4x_rptb_rpts_p PARAMS ((rtx, rtx));
+extern int c4x_rptb_rpts_p (rtx, rtx);
-extern int c4x_check_laj_p PARAMS ((rtx));
+extern int c4x_check_laj_p (rtx);
-extern int c4x_autoinc_operand PARAMS ((rtx, enum machine_mode));
+extern int c4x_autoinc_operand (rtx, enum machine_mode);
-extern int any_operand PARAMS ((rtx, enum machine_mode));
+extern int any_operand (rtx, enum machine_mode);
-extern int fp_zero_operand PARAMS ((rtx, enum machine_mode));
+extern int fp_zero_operand (rtx, enum machine_mode);
-extern int const_operand PARAMS ((rtx, enum machine_mode));
+extern int const_operand (rtx, enum machine_mode);
-extern int stik_const_operand PARAMS ((rtx, enum machine_mode));
+extern int stik_const_operand (rtx, enum machine_mode);
-extern int not_const_operand PARAMS ((rtx, enum machine_mode));
+extern int not_const_operand (rtx, enum machine_mode);
-extern int parallel_operand PARAMS ((rtx, enum machine_mode));
+extern int parallel_operand (rtx, enum machine_mode);
-extern int reg_or_const_operand PARAMS ((rtx, enum machine_mode));
+extern int reg_or_const_operand (rtx, enum machine_mode);
-extern int reg_operand PARAMS ((rtx, enum machine_mode));
+extern int reg_operand (rtx, enum machine_mode);
-extern int mixed_subreg_operand PARAMS ((rtx, enum machine_mode));
+extern int mixed_subreg_operand (rtx, enum machine_mode);
-extern int reg_imm_operand PARAMS ((rtx, enum machine_mode));
+extern int reg_imm_operand (rtx, enum machine_mode);
-extern int r0r1_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int r0r1_reg_operand (rtx, enum machine_mode);
-extern int r2r3_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int r2r3_reg_operand (rtx, enum machine_mode);
-extern int ext_low_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int ext_low_reg_operand (rtx, enum machine_mode);
-extern int ext_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int ext_reg_operand (rtx, enum machine_mode);
-extern int std_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int std_reg_operand (rtx, enum machine_mode);
-extern int std_or_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int std_or_reg_operand (rtx, enum machine_mode);
-extern int dst_operand PARAMS ((rtx, enum machine_mode));
+extern int dst_operand (rtx, enum machine_mode);
-extern int src_operand PARAMS ((rtx, enum machine_mode));
+extern int src_operand (rtx, enum machine_mode);
-extern int src_hi_operand PARAMS ((rtx, enum machine_mode));
+extern int src_hi_operand (rtx, enum machine_mode);
-extern int lsrc_operand PARAMS ((rtx, enum machine_mode));
+extern int lsrc_operand (rtx, enum machine_mode);
-extern int tsrc_operand PARAMS ((rtx, enum machine_mode));
+extern int tsrc_operand (rtx, enum machine_mode);
-extern int nonimmediate_src_operand PARAMS ((rtx, enum machine_mode));
+extern int nonimmediate_src_operand (rtx, enum machine_mode);
-extern int nonimmediate_lsrc_operand PARAMS ((rtx, enum machine_mode));
+extern int nonimmediate_lsrc_operand (rtx, enum machine_mode);
-extern int addr_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int addr_reg_operand (rtx, enum machine_mode);
-extern int index_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int index_reg_operand (rtx, enum machine_mode);
-extern int dp_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int dp_reg_operand (rtx, enum machine_mode);
-extern int sp_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int sp_reg_operand (rtx, enum machine_mode);
-extern int rc_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int rc_reg_operand (rtx, enum machine_mode);
-extern int st_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int st_reg_operand (rtx, enum machine_mode);
-extern int symbolic_address_operand PARAMS ((rtx, enum machine_mode));
+extern int symbolic_address_operand (rtx, enum machine_mode);
-extern int ar0_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int ar0_reg_operand (rtx, enum machine_mode);
-extern int ar0_mem_operand PARAMS ((rtx, enum machine_mode));
+extern int ar0_mem_operand (rtx, enum machine_mode);
-extern int ar1_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int ar1_reg_operand (rtx, enum machine_mode);
-extern int ar1_mem_operand PARAMS ((rtx, enum machine_mode));
+extern int ar1_mem_operand (rtx, enum machine_mode);
-extern int ar2_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int ar2_reg_operand (rtx, enum machine_mode);
-extern int ar2_mem_operand PARAMS ((rtx, enum machine_mode));
+extern int ar2_mem_operand (rtx, enum machine_mode);
-extern int ar3_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int ar3_reg_operand (rtx, enum machine_mode);
-extern int ar3_mem_operand PARAMS ((rtx, enum machine_mode));
+extern int ar3_mem_operand (rtx, enum machine_mode);
-extern int ar4_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int ar4_reg_operand (rtx, enum machine_mode);
-extern int ar4_mem_operand PARAMS ((rtx, enum machine_mode));
+extern int ar4_mem_operand (rtx, enum machine_mode);
-extern int ar5_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int ar5_reg_operand (rtx, enum machine_mode);
-extern int ar5_mem_operand PARAMS ((rtx, enum machine_mode));
+extern int ar5_mem_operand (rtx, enum machine_mode);
-extern int ar6_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int ar6_reg_operand (rtx, enum machine_mode);
-extern int ar6_mem_operand PARAMS ((rtx, enum machine_mode));
+extern int ar6_mem_operand (rtx, enum machine_mode);
-extern int ar7_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int ar7_reg_operand (rtx, enum machine_mode);
-extern int ar7_mem_operand PARAMS ((rtx, enum machine_mode));
+extern int ar7_mem_operand (rtx, enum machine_mode);
-extern int ir0_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int ir0_reg_operand (rtx, enum machine_mode);
-extern int ir0_mem_operand PARAMS ((rtx, enum machine_mode));
+extern int ir0_mem_operand (rtx, enum machine_mode);
-extern int ir1_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int ir1_reg_operand (rtx, enum machine_mode);
-extern int ir1_mem_operand PARAMS ((rtx, enum machine_mode));
+extern int ir1_mem_operand (rtx, enum machine_mode);
-extern int group1_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int group1_reg_operand (rtx, enum machine_mode);
-extern int group1_mem_operand PARAMS ((rtx, enum machine_mode));
+extern int group1_mem_operand (rtx, enum machine_mode);
-extern int arx_reg_operand PARAMS ((rtx, enum machine_mode));
+extern int arx_reg_operand (rtx, enum machine_mode);
-extern int call_address_operand PARAMS ((rtx, enum machine_mode));
+extern int call_address_operand (rtx, enum machine_mode);
-extern int par_ind_operand PARAMS ((rtx, enum machine_mode));
+extern int par_ind_operand (rtx, enum machine_mode);
-extern int not_rc_reg PARAMS ((rtx, enum machine_mode));
+extern int not_rc_reg (rtx, enum machine_mode);
-extern int not_modify_reg PARAMS ((rtx, enum machine_mode));
+extern int not_modify_reg (rtx, enum machine_mode);
-extern int c4x_shiftable_constant PARAMS ((rtx));
+extern int c4x_shiftable_constant (rtx);
-extern int c4x_H_constant PARAMS ((rtx));
+extern int c4x_H_constant (rtx);
-extern int c4x_I_constant PARAMS ((rtx));
+extern int c4x_I_constant (rtx);
-extern int c4x_J_constant PARAMS ((rtx));
+extern int c4x_J_constant (rtx);
-extern int c4x_L_constant PARAMS ((rtx));
+extern int c4x_L_constant (rtx);
-extern int c4x_Q_constraint PARAMS ((rtx));
+extern int c4x_Q_constraint (rtx);
-extern int c4x_R_constraint PARAMS ((rtx));
+extern int c4x_R_constraint (rtx);
-extern int c4x_S_constraint PARAMS ((rtx));
+extern int c4x_S_constraint (rtx);
-extern int c4x_T_constraint PARAMS ((rtx));
+extern int c4x_T_constraint (rtx);
-extern int c4x_U_constraint PARAMS ((rtx));
+extern int c4x_U_constraint (rtx);
-extern void c4x_emit_libcall PARAMS ((rtx, enum rtx_code,
- enum machine_mode,
- enum machine_mode, int, rtx *));
+extern void c4x_emit_libcall (rtx, enum rtx_code, enum machine_mode,
+ enum machine_mode, int, rtx *);
-extern void c4x_emit_libcall3 PARAMS ((rtx, enum rtx_code,
- enum machine_mode, rtx *));
+extern void c4x_emit_libcall3 (rtx, enum rtx_code, enum machine_mode, rtx *);
-extern void c4x_emit_libcall_mulhi PARAMS ((rtx, enum rtx_code,
- enum machine_mode, rtx *));
+extern void c4x_emit_libcall_mulhi (rtx, enum rtx_code,
+ enum machine_mode, rtx *);
-extern int c4x_emit_move_sequence PARAMS ((rtx *, enum machine_mode));
+extern int c4x_emit_move_sequence (rtx *, enum machine_mode);
-extern int legitimize_operands PARAMS ((enum rtx_code, rtx *,
- enum machine_mode));
+extern int legitimize_operands (enum rtx_code, rtx *, enum machine_mode);
-extern int valid_operands PARAMS ((enum rtx_code, rtx *, enum machine_mode));
+extern int valid_operands (enum rtx_code, rtx *, enum machine_mode);
-extern int valid_parallel_load_store PARAMS ((rtx *, enum machine_mode));
+extern int valid_parallel_load_store (rtx *, enum machine_mode);
-extern int valid_parallel_operands_4 PARAMS ((rtx *, enum machine_mode));
+extern int valid_parallel_operands_4 (rtx *, enum machine_mode);
-extern int valid_parallel_operands_5 PARAMS ((rtx *, enum machine_mode));
+extern int valid_parallel_operands_5 (rtx *, enum machine_mode);
-extern int valid_parallel_operands_6 PARAMS ((rtx *, enum machine_mode));
+extern int valid_parallel_operands_6 (rtx *, enum machine_mode);
extern GTY(()) rtx smulhi3_libfunc;
extern GTY(()) rtx umulhi3_libfunc;
extern int c4x_rpts_cycles; /* Max cycles for RPTS. */
extern int c4x_cpu_version; /* Cpu version C30/31/32/40/44. */
-extern void c4x_pr_CODE_SECTION PARAMS ((struct cpp_reader *));
-extern void c4x_pr_DATA_SECTION PARAMS ((struct cpp_reader *));
-extern void c4x_pr_FUNC_IS_PURE PARAMS ((struct cpp_reader *));
-extern void c4x_pr_FUNC_NEVER_RETURNS PARAMS ((struct cpp_reader *));
-extern void c4x_pr_INTERRUPT PARAMS ((struct cpp_reader *));
-extern void c4x_pr_ignored PARAMS ((struct cpp_reader *));
-extern void c4x_init_pragma PARAMS ((int (*) (tree *)));
+extern void c4x_pr_CODE_SECTION (struct cpp_reader *);
+extern void c4x_pr_DATA_SECTION (struct cpp_reader *);
+extern void c4x_pr_FUNC_IS_PURE (struct cpp_reader *);
+extern void c4x_pr_FUNC_NEVER_RETURNS (struct cpp_reader *);
+extern void c4x_pr_INTERRUPT (struct cpp_reader *);
+extern void c4x_pr_ignored (struct cpp_reader *);
+extern void c4x_init_pragma (int (*) (tree *));
extern GTY(()) tree code_tree;
extern GTY(()) tree data_tree;
/* Subroutines for assembler code output on the TMS320C[34]x
- Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
+ Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2003
Free Software Foundation, Inc.
Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz)
tree naked_tree = NULL_TREE;
/* Forward declarations */
-static int c4x_isr_reg_used_p PARAMS ((unsigned int));
-static int c4x_leaf_function_p PARAMS ((void));
-static int c4x_naked_function_p PARAMS ((void));
-static int c4x_immed_float_p PARAMS ((rtx));
-static int c4x_a_register PARAMS ((rtx));
-static int c4x_x_register PARAMS ((rtx));
-static int c4x_immed_int_constant PARAMS ((rtx));
-static int c4x_immed_float_constant PARAMS ((rtx));
-static int c4x_K_constant PARAMS ((rtx));
-static int c4x_N_constant PARAMS ((rtx));
-static int c4x_O_constant PARAMS ((rtx));
-static int c4x_R_indirect PARAMS ((rtx));
-static int c4x_S_indirect PARAMS ((rtx));
-static void c4x_S_address_parse PARAMS ((rtx , int *, int *, int *, int *));
-static int c4x_valid_operands PARAMS ((enum rtx_code, rtx *,
- enum machine_mode, int));
-static int c4x_arn_reg_operand PARAMS ((rtx, enum machine_mode, unsigned int));
-static int c4x_arn_mem_operand PARAMS ((rtx, enum machine_mode, unsigned int));
-static void c4x_file_start PARAMS ((void));
-static void c4x_file_end PARAMS ((void));
-static void c4x_check_attribute PARAMS ((const char *, tree, tree, tree *));
-static int c4x_r11_set_p PARAMS ((rtx));
-static int c4x_rptb_valid_p PARAMS ((rtx, rtx));
-static void c4x_reorg PARAMS ((void));
-static int c4x_label_ref_used_p PARAMS ((rtx, rtx));
-static tree c4x_handle_fntype_attribute PARAMS ((tree *, tree, tree, int, bool *));
+static int c4x_isr_reg_used_p (unsigned int);
+static int c4x_leaf_function_p (void);
+static int c4x_naked_function_p (void);
+static int c4x_immed_float_p (rtx);
+static int c4x_a_register (rtx);
+static int c4x_x_register (rtx);
+static int c4x_immed_int_constant (rtx);
+static int c4x_immed_float_constant (rtx);
+static int c4x_K_constant (rtx);
+static int c4x_N_constant (rtx);
+static int c4x_O_constant (rtx);
+static int c4x_R_indirect (rtx);
+static int c4x_S_indirect (rtx);
+static void c4x_S_address_parse (rtx , int *, int *, int *, int *);
+static int c4x_valid_operands (enum rtx_code, rtx *, enum machine_mode, int);
+static int c4x_arn_reg_operand (rtx, enum machine_mode, unsigned int);
+static int c4x_arn_mem_operand (rtx, enum machine_mode, unsigned int);
+static void c4x_file_start (void);
+static void c4x_file_end (void);
+static void c4x_check_attribute (const char *, tree, tree, tree *);
+static int c4x_r11_set_p (rtx);
+static int c4x_rptb_valid_p (rtx, rtx);
+static void c4x_reorg (void);
+static int c4x_label_ref_used_p (rtx, rtx);
+static tree c4x_handle_fntype_attribute (tree *, tree, tree, int, bool *);
const struct attribute_spec c4x_attribute_table[];
-static void c4x_insert_attributes PARAMS ((tree, tree *));
-static void c4x_asm_named_section PARAMS ((const char *, unsigned int));
-static int c4x_adjust_cost PARAMS ((rtx, rtx, rtx, int));
-static void c4x_globalize_label PARAMS ((FILE *, const char *));
-static bool c4x_rtx_costs PARAMS ((rtx, int, int, int *));
-static int c4x_address_cost PARAMS ((rtx));
+static void c4x_insert_attributes (tree, tree *);
+static void c4x_asm_named_section (const char *, unsigned int);
+static int c4x_adjust_cost (rtx, rtx, rtx, int);
+static void c4x_globalize_label (FILE *, const char *);
+static bool c4x_rtx_costs (rtx, int, int, int *);
+static int c4x_address_cost (rtx);
\f
/* Initialize the GCC target structure. */
#undef TARGET_ASM_BYTE_OP
type and sometimes adjust other TARGET_ options. */
void
-c4x_override_options ()
+c4x_override_options (void)
{
if (c4x_rpts_cycles_string)
c4x_rpts_cycles = atoi (c4x_rpts_cycles_string);
/* This is called before c4x_override_options. */
void
-c4x_optimization_options (level, size)
- int level ATTRIBUTE_UNUSED;
- int size ATTRIBUTE_UNUSED;
+c4x_optimization_options (int level ATTRIBUTE_UNUSED,
+ int size ATTRIBUTE_UNUSED)
{
/* Scheduling before register allocation can screw up global
register allocation, especially for functions that use MPY||ADD
#define C4X_ASCII_LIMIT 40
void
-c4x_output_ascii (stream, ptr, len)
- FILE *stream;
- const char *ptr;
- int len;
+c4x_output_ascii (FILE *stream, const char *ptr, int len)
{
char sbuf[C4X_ASCII_LIMIT + 1];
int s, l, special, first = 1, onlys;
int
-c4x_hard_regno_mode_ok (regno, mode)
- unsigned int regno;
- enum machine_mode mode;
+c4x_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode)
{
switch (mode)
{
/* Return nonzero if REGNO1 can be renamed to REGNO2. */
int
-c4x_hard_regno_rename_ok (regno1, regno2)
- unsigned int regno1;
- unsigned int regno2;
+c4x_hard_regno_rename_ok (unsigned int regno1, unsigned int regno2)
{
/* We can not copy call saved registers from mode QI into QF or from
mode QF into QI. */
For a library call, FNTYPE is 0. */
void
-c4x_init_cumulative_args (cum, fntype, libname)
- CUMULATIVE_ARGS *cum; /* Argument info to initialize. */
- tree fntype; /* Tree ptr for function decl. */
- rtx libname; /* SYMBOL_REF of library name or 0. */
+c4x_init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, rtx libname)
{
tree param, next_param;
(TYPE is null for libcalls where that information may not be available.) */
void
-c4x_function_arg_advance (cum, mode, type, named)
- CUMULATIVE_ARGS *cum; /* Current arg information. */
- enum machine_mode mode; /* Current arg mode. */
- tree type; /* Type of the arg or 0 if lib support. */
- int named; /* Whether or not the argument was named. */
+c4x_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
+ tree type, int named)
{
if (TARGET_DEBUG)
fprintf (stderr, "c4x_function_adv(mode=%s, named=%d)\n\n",
(otherwise it is an extra parameter matching an ellipsis). */
struct rtx_def *
-c4x_function_arg (cum, mode, type, named)
- CUMULATIVE_ARGS *cum; /* Current arg information. */
- enum machine_mode mode; /* Current arg mode. */
- tree type; /* Type of the arg or 0 if lib support. */
- int named; /* != 0 for normal args, == 0 for ... args. */
+c4x_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode,
+ tree type, int named)
{
int reg = 0; /* Default to passing argument on stack. */
/* C[34]x arguments grow in weird ways (downwards) that the standard
varargs stuff can't handle.. */
rtx
-c4x_va_arg (valist, type)
- tree valist, type;
+c4x_va_arg (tree valist, tree type)
{
tree t;
static int
-c4x_isr_reg_used_p (regno)
- unsigned int regno;
+c4x_isr_reg_used_p (unsigned int regno)
{
/* Don't save/restore FP or ST, we handle them separately. */
if (regno == FRAME_POINTER_REGNUM
static int
-c4x_leaf_function_p ()
+c4x_leaf_function_p (void)
{
/* A leaf function makes no calls, so we only need
to save/restore the registers we actually use.
static int
-c4x_naked_function_p ()
+c4x_naked_function_p (void)
{
tree type;
int
-c4x_interrupt_function_p ()
+c4x_interrupt_function_p (void)
{
if (lookup_attribute ("interrupt",
TYPE_ATTRIBUTES (TREE_TYPE (current_function_decl))))
}
void
-c4x_expand_prologue ()
+c4x_expand_prologue (void)
{
unsigned int regno;
int size = get_frame_size ();
void
-c4x_expand_epilogue()
+c4x_expand_epilogue(void)
{
int regno;
int jump = 0;
int
-c4x_null_epilogue_p ()
+c4x_null_epilogue_p (void)
{
int regno;
int
-c4x_emit_move_sequence (operands, mode)
- rtx *operands;
- enum machine_mode mode;
+c4x_emit_move_sequence (rtx *operands, enum machine_mode mode)
{
rtx op0 = operands[0];
rtx op1 = operands[1];
void
-c4x_emit_libcall (libcall, code, dmode, smode, noperands, operands)
- rtx libcall;
- enum rtx_code code;
- enum machine_mode dmode;
- enum machine_mode smode;
- int noperands;
- rtx *operands;
+c4x_emit_libcall (rtx libcall, enum rtx_code code,
+ enum machine_mode dmode, enum machine_mode smode,
+ int noperands, rtx *operands)
{
rtx ret;
rtx insns;
void
-c4x_emit_libcall3 (libcall, code, mode, operands)
- rtx libcall;
- enum rtx_code code;
- enum machine_mode mode;
- rtx *operands;
+c4x_emit_libcall3 (rtx libcall, enum rtx_code code,
+ enum machine_mode mode, rtx *operands)
{
c4x_emit_libcall (libcall, code, mode, mode, 3, operands);
}
void
-c4x_emit_libcall_mulhi (libcall, code, mode, operands)
- rtx libcall;
- enum rtx_code code;
- enum machine_mode mode;
- rtx *operands;
+c4x_emit_libcall_mulhi (rtx libcall, enum rtx_code code,
+ enum machine_mode mode, rtx *operands)
{
rtx ret;
rtx insns;
int
-c4x_check_legit_addr (mode, addr, strict)
- enum machine_mode mode;
- rtx addr;
- int strict;
+c4x_check_legit_addr (enum machine_mode mode, rtx addr, int strict)
{
rtx base = NULL_RTX; /* Base register (AR0-AR7). */
rtx indx = NULL_RTX; /* Index register (IR0,IR1). */
rtx
-c4x_legitimize_address (orig, mode)
- rtx orig ATTRIBUTE_UNUSED;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+c4x_legitimize_address (rtx orig ATTRIBUTE_UNUSED,
+ enum machine_mode mode ATTRIBUTE_UNUSED)
{
if (GET_CODE (orig) == SYMBOL_REF
|| GET_CODE (orig) == LABEL_REF)
Unfortunately, the C4x address cost depends on other operands. */
static int
-c4x_address_cost (addr)
- rtx addr;
+c4x_address_cost (rtx addr)
{
switch (GET_CODE (addr))
{
rtx
-c4x_gen_compare_reg (code, x, y)
- enum rtx_code code;
- rtx x, y;
+c4x_gen_compare_reg (enum rtx_code code, rtx x, rtx y)
{
enum machine_mode mode = SELECT_CC_MODE (code, x, y);
rtx cc_reg;
}
char *
-c4x_output_cbranch (form, seq)
- const char *form;
- rtx seq;
+c4x_output_cbranch (const char *form, rtx seq)
{
int delayed = 0;
int annultrue = 0;
}
void
-c4x_print_operand (file, op, letter)
- FILE *file; /* File to write to. */
- rtx op; /* Operand to print. */
- int letter; /* %<letter> or 0. */
+c4x_print_operand (FILE *file, rtx op, int letter)
{
rtx op1;
enum rtx_code code;
void
-c4x_print_operand_address (file, addr)
- FILE *file;
- rtx addr;
+c4x_print_operand_address (FILE *file, rtx addr)
{
switch (GET_CODE (addr))
{
in the immediate field. */
static int
-c4x_immed_float_p (op)
- rtx op;
+c4x_immed_float_p (rtx op)
{
long convval[2];
int exponent;
!!! FIXME. The rptb_top insn may be sucked into a SEQUENCE. */
int
-c4x_rptb_nop_p (insn)
- rtx insn;
+c4x_rptb_nop_p (rtx insn)
{
rtx start_label;
int i;
pass. The C4x cpu can not handle this. */
static int
-c4x_label_ref_used_p (x, code_label)
- rtx x, code_label;
+c4x_label_ref_used_p (rtx x, rtx code_label)
{
enum rtx_code code;
int i, j;
static int
-c4x_rptb_valid_p (insn, start_label)
- rtx insn, start_label;
+c4x_rptb_valid_p (rtx insn, rtx start_label)
{
rtx end = insn;
rtx start;
void
-c4x_rptb_insert (insn)
- rtx insn;
+c4x_rptb_insert (rtx insn)
{
rtx end_label;
rtx start_label;
allocated as the loop counter. */
static void
-c4x_reorg ()
+c4x_reorg (void)
{
rtx insn;
static int
-c4x_a_register (op)
- rtx op;
+c4x_a_register (rtx op)
{
return REG_P (op) && IS_ADDR_OR_PSEUDO_REG (op);
}
static int
-c4x_x_register (op)
- rtx op;
+c4x_x_register (rtx op)
{
return REG_P (op) && IS_INDEX_OR_PSEUDO_REG (op);
}
static int
-c4x_immed_int_constant (op)
- rtx op;
+c4x_immed_int_constant (rtx op)
{
if (GET_CODE (op) != CONST_INT)
return 0;
static int
-c4x_immed_float_constant (op)
- rtx op;
+c4x_immed_float_constant (rtx op)
{
if (GET_CODE (op) != CONST_DOUBLE)
return 0;
int
-c4x_shiftable_constant (op)
- rtx op;
+c4x_shiftable_constant (rtx op)
{
int i;
int mask;
int
-c4x_H_constant (op)
- rtx op;
+c4x_H_constant (rtx op)
{
return c4x_immed_float_constant (op) && c4x_immed_float_p (op);
}
int
-c4x_I_constant (op)
- rtx op;
+c4x_I_constant (rtx op)
{
return c4x_immed_int_constant (op) && IS_INT16_CONST (INTVAL (op));
}
int
-c4x_J_constant (op)
- rtx op;
+c4x_J_constant (rtx op)
{
if (TARGET_C3X)
return 0;
static int
-c4x_K_constant (op)
- rtx op;
+c4x_K_constant (rtx op)
{
if (TARGET_C3X || ! c4x_immed_int_constant (op))
return 0;
int
-c4x_L_constant (op)
- rtx op;
+c4x_L_constant (rtx op)
{
return c4x_immed_int_constant (op) && IS_UINT16_CONST (INTVAL (op));
}
static int
-c4x_N_constant (op)
- rtx op;
+c4x_N_constant (rtx op)
{
return c4x_immed_int_constant (op) && IS_NOT_UINT16_CONST (INTVAL (op));
}
static int
-c4x_O_constant (op)
- rtx op;
+c4x_O_constant (rtx op)
{
return c4x_immed_int_constant (op) && IS_HIGH_CONST (INTVAL (op));
}
they are handled by the <> constraints. */
int
-c4x_Q_constraint (op)
- rtx op;
+c4x_Q_constraint (rtx op)
{
enum machine_mode mode = GET_MODE (op);
*ARx, *+ARx(n) for n < 32. */
int
-c4x_R_constraint (op)
- rtx op;
+c4x_R_constraint (rtx op)
{
enum machine_mode mode = GET_MODE (op);
static int
-c4x_R_indirect (op)
- rtx op;
+c4x_R_indirect (rtx op)
{
enum machine_mode mode = GET_MODE (op);
they are handled by the <> constraints. */
int
-c4x_S_constraint (op)
- rtx op;
+c4x_S_constraint (rtx op)
{
enum machine_mode mode = GET_MODE (op);
if (GET_CODE (op) != MEM)
static int
-c4x_S_indirect (op)
- rtx op;
+c4x_S_indirect (rtx op)
{
enum machine_mode mode = GET_MODE (op);
if (GET_CODE (op) != MEM)
/* Direct memory operand. */
int
-c4x_T_constraint (op)
- rtx op;
+c4x_T_constraint (rtx op)
{
if (GET_CODE (op) != MEM)
return 0;
/* Symbolic operand. */
int
-c4x_U_constraint (op)
- rtx op;
+c4x_U_constraint (rtx op)
{
/* Don't allow direct addressing to an arbitrary constant. */
return GET_CODE (op) == CONST
int
-c4x_autoinc_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+c4x_autoinc_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
if (GET_CODE (op) == MEM)
{
/* Match any operand. */
int
-any_operand (op, mode)
- register rtx op ATTRIBUTE_UNUSED;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+any_operand (register rtx op ATTRIBUTE_UNUSED,
+ enum machine_mode mode ATTRIBUTE_UNUSED)
{
return 1;
}
/* Nonzero if OP is a floating point value with value 0.0. */
int
-fp_zero_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+fp_zero_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
REAL_VALUE_TYPE r;
int
-const_operand (op, mode)
- register rtx op;
- register enum machine_mode mode;
+const_operand (register rtx op, register enum machine_mode mode)
{
switch (mode)
{
int
-stik_const_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+stik_const_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
return c4x_K_constant (op);
}
int
-not_const_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+not_const_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
return c4x_N_constant (op);
}
int
-reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+reg_operand (rtx op, enum machine_mode mode)
{
if (GET_CODE (op) == SUBREG
&& GET_MODE (op) == QFmode)
int
-mixed_subreg_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+mixed_subreg_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
/* Allow (subreg:HF (reg:HI)) that be generated for a union of an
int and a long double. */
int
-reg_imm_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+reg_imm_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
if (REG_P (op) || CONSTANT_P (op))
return 1;
int
-not_modify_reg (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+not_modify_reg (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
if (REG_P (op) || CONSTANT_P (op))
return 1;
int
-not_rc_reg (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+not_rc_reg (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
if (REG_P (op) && REGNO (op) == RC_REGNO)
return 0;
/* Extended precision register R0-R1. */
int
-r0r1_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+r0r1_reg_operand (rtx op, enum machine_mode mode)
{
if (! reg_operand (op, mode))
return 0;
/* Extended precision register R2-R3. */
int
-r2r3_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+r2r3_reg_operand (rtx op, enum machine_mode mode)
{
if (! reg_operand (op, mode))
return 0;
/* Low extended precision register R0-R7. */
int
-ext_low_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ext_low_reg_operand (rtx op, enum machine_mode mode)
{
if (! reg_operand (op, mode))
return 0;
/* Extended precision register. */
int
-ext_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ext_reg_operand (rtx op, enum machine_mode mode)
{
if (! reg_operand (op, mode))
return 0;
/* Standard precision register. */
int
-std_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+std_reg_operand (rtx op, enum machine_mode mode)
{
if (! reg_operand (op, mode))
return 0;
/* Standard precision or normal register. */
int
-std_or_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+std_or_reg_operand (rtx op, enum machine_mode mode)
{
if (reload_in_progress)
return std_reg_operand (op, mode);
/* Address register. */
int
-addr_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+addr_reg_operand (rtx op, enum machine_mode mode)
{
if (! reg_operand (op, mode))
return 0;
/* Index register. */
int
-index_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+index_reg_operand (rtx op, enum machine_mode mode)
{
if (! reg_operand (op, mode))
return 0;
/* DP register. */
int
-dp_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+dp_reg_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
return REG_P (op) && IS_DP_OR_PSEUDO_REG (op);
}
/* SP register. */
int
-sp_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+sp_reg_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
return REG_P (op) && IS_SP_OR_PSEUDO_REG (op);
}
/* ST register. */
int
-st_reg_operand (op, mode)
- register rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+st_reg_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
return REG_P (op) && IS_ST_OR_PSEUDO_REG (op);
}
/* RC register. */
int
-rc_reg_operand (op, mode)
- register rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+rc_reg_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
return REG_P (op) && IS_RC_OR_PSEUDO_REG (op);
}
int
-call_address_operand (op, mode)
- rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+call_address_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
return (REG_P (op) || symbolic_address_operand (op, mode));
}
/* Symbolic address operand. */
int
-symbolic_address_operand (op, mode)
- register rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+symbolic_address_operand (register rtx op,
+ enum machine_mode mode ATTRIBUTE_UNUSED)
{
switch (GET_CODE (op))
{
/* Check dst operand of a move instruction. */
int
-dst_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+dst_operand (rtx op, enum machine_mode mode)
{
if (GET_CODE (op) == SUBREG
&& mixed_subreg_operand (op, mode))
/* Check src operand of two operand arithmetic instructions. */
int
-src_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+src_operand (rtx op, enum machine_mode mode)
{
if (GET_CODE (op) == SUBREG
&& mixed_subreg_operand (op, mode))
int
-src_hi_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+src_hi_operand (rtx op, enum machine_mode mode)
{
if (c4x_O_constant (op))
return 1;
/* Check src operand of two operand logical instructions. */
int
-lsrc_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+lsrc_operand (rtx op, enum machine_mode mode)
{
if (mode == VOIDmode)
mode = GET_MODE (op);
/* Check src operand of two operand tricky instructions. */
int
-tsrc_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+tsrc_operand (rtx op, enum machine_mode mode)
{
if (mode == VOIDmode)
mode = GET_MODE (op);
/* Check src operand of two operand non immedidate instructions. */
int
-nonimmediate_src_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+nonimmediate_src_operand (rtx op, enum machine_mode mode)
{
if (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE)
return 0;
/* Check logical src operand of two operand non immedidate instructions. */
int
-nonimmediate_lsrc_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+nonimmediate_lsrc_operand (rtx op, enum machine_mode mode)
{
if (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE)
return 0;
int
-reg_or_const_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+reg_or_const_operand (rtx op, enum machine_mode mode)
{
return reg_operand (op, mode) || const_operand (op, mode);
}
/* Check for indirect operands allowable in parallel instruction. */
int
-par_ind_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+par_ind_operand (rtx op, enum machine_mode mode)
{
if (mode != VOIDmode && mode != GET_MODE (op))
return 0;
/* Check for operands allowable in parallel instruction. */
int
-parallel_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+parallel_operand (rtx op, enum machine_mode mode)
{
return ext_low_reg_operand (op, mode) || par_ind_operand (op, mode);
}
static void
-c4x_S_address_parse (op, base, incdec, index, disp)
- rtx op;
- int *base;
- int *incdec;
- int *index;
- int *disp;
+c4x_S_address_parse (rtx op, int *base, int *incdec, int *index, int *disp)
{
*base = 0;
*incdec = 0;
int
-c4x_address_conflict (op0, op1, store0, store1)
- rtx op0;
- rtx op1;
- int store0;
- int store1;
+c4x_address_conflict (rtx op0, rtx op1, int store0, int store1)
{
int base0;
int base1;
/* Check for while loop inside a decrement and branch loop. */
int
-c4x_label_conflict (insn, jump, db)
- rtx insn;
- rtx jump;
- rtx db;
+c4x_label_conflict (rtx insn, rtx jump, rtx db)
{
while (insn)
{
/* Validate combination of operands for parallel load/store instructions. */
int
-valid_parallel_load_store (operands, mode)
- rtx *operands;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+valid_parallel_load_store (rtx *operands,
+ enum machine_mode mode ATTRIBUTE_UNUSED)
{
rtx op0 = operands[0];
rtx op1 = operands[1];
int
-valid_parallel_operands_4 (operands, mode)
- rtx *operands;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+valid_parallel_operands_4 (rtx *operands,
+ enum machine_mode mode ATTRIBUTE_UNUSED)
{
rtx op0 = operands[0];
rtx op2 = operands[2];
int
-valid_parallel_operands_5 (operands, mode)
- rtx *operands;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+valid_parallel_operands_5 (rtx *operands,
+ enum machine_mode mode ATTRIBUTE_UNUSED)
{
int regs = 0;
rtx op0 = operands[0];
int
-valid_parallel_operands_6 (operands, mode)
- rtx *operands;
- enum machine_mode mode ATTRIBUTE_UNUSED;
+valid_parallel_operands_6 (rtx *operands,
+ enum machine_mode mode ATTRIBUTE_UNUSED)
{
int regs = 0;
rtx op0 = operands[0];
that the destination regno is valid if we have a 2 operand insn. */
static int
-c4x_valid_operands (code, operands, mode, force)
- enum rtx_code code;
- rtx *operands;
- enum machine_mode mode ATTRIBUTE_UNUSED;
- int force;
+c4x_valid_operands (enum rtx_code code, rtx *operands,
+ enum machine_mode mode ATTRIBUTE_UNUSED,
+ int force)
{
rtx op1;
rtx op2;
}
-int valid_operands (code, operands, mode)
- enum rtx_code code;
- rtx *operands;
- enum machine_mode mode;
+int valid_operands (enum rtx_code code, rtx *operands, enum machine_mode mode)
{
/* If we are not optimizing then we have to let anything go and let
int
-legitimize_operands (code, operands, mode)
- enum rtx_code code;
- rtx *operands;
- enum machine_mode mode;
+legitimize_operands (enum rtx_code code, rtx *operands, enum machine_mode mode)
{
/* Compare only has 2 operands. */
if (code == COMPARE)
/* The following predicates are used for instruction scheduling. */
int
-group1_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+group1_reg_operand (rtx op, enum machine_mode mode)
{
if (mode != VOIDmode && mode != GET_MODE (op))
return 0;
int
-group1_mem_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+group1_mem_operand (rtx op, enum machine_mode mode)
{
if (mode != VOIDmode && mode != GET_MODE (op))
return 0;
/* Return true if any one of the address registers. */
int
-arx_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+arx_reg_operand (rtx op, enum machine_mode mode)
{
if (mode != VOIDmode && mode != GET_MODE (op))
return 0;
static int
-c4x_arn_reg_operand (op, mode, regno)
- rtx op;
- enum machine_mode mode;
- unsigned int regno;
+c4x_arn_reg_operand (rtx op, enum machine_mode mode, unsigned int regno)
{
if (mode != VOIDmode && mode != GET_MODE (op))
return 0;
static int
-c4x_arn_mem_operand (op, mode, regno)
- rtx op;
- enum machine_mode mode;
- unsigned int regno;
+c4x_arn_mem_operand (rtx op, enum machine_mode mode, unsigned int regno)
{
if (mode != VOIDmode && mode != GET_MODE (op))
return 0;
int
-ar0_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar0_reg_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_reg_operand (op, mode, AR0_REGNO);
}
int
-ar0_mem_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar0_mem_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_mem_operand (op, mode, AR0_REGNO);
}
int
-ar1_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar1_reg_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_reg_operand (op, mode, AR1_REGNO);
}
int
-ar1_mem_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar1_mem_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_mem_operand (op, mode, AR1_REGNO);
}
int
-ar2_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar2_reg_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_reg_operand (op, mode, AR2_REGNO);
}
int
-ar2_mem_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar2_mem_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_mem_operand (op, mode, AR2_REGNO);
}
int
-ar3_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar3_reg_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_reg_operand (op, mode, AR3_REGNO);
}
int
-ar3_mem_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar3_mem_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_mem_operand (op, mode, AR3_REGNO);
}
int
-ar4_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar4_reg_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_reg_operand (op, mode, AR4_REGNO);
}
int
-ar4_mem_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar4_mem_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_mem_operand (op, mode, AR4_REGNO);
}
int
-ar5_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar5_reg_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_reg_operand (op, mode, AR5_REGNO);
}
int
-ar5_mem_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar5_mem_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_mem_operand (op, mode, AR5_REGNO);
}
int
-ar6_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar6_reg_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_reg_operand (op, mode, AR6_REGNO);
}
int
-ar6_mem_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar6_mem_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_mem_operand (op, mode, AR6_REGNO);
}
int
-ar7_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar7_reg_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_reg_operand (op, mode, AR7_REGNO);
}
int
-ar7_mem_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ar7_mem_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_mem_operand (op, mode, AR7_REGNO);
}
int
-ir0_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ir0_reg_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_reg_operand (op, mode, IR0_REGNO);
}
int
-ir0_mem_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ir0_mem_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_mem_operand (op, mode, IR0_REGNO);
}
int
-ir1_reg_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ir1_reg_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_reg_operand (op, mode, IR1_REGNO);
}
int
-ir1_mem_operand (op, mode)
- rtx op;
- enum machine_mode mode;
+ir1_mem_operand (rtx op, enum machine_mode mode)
{
return c4x_arn_mem_operand (op, mode, IR1_REGNO);
}
addressing. */
rtx
-c4x_operand_subword (op, i, validate_address, mode)
- rtx op;
- int i;
- int validate_address;
- enum machine_mode mode;
+c4x_operand_subword (rtx op, int i, int validate_address,
+ enum machine_mode mode)
{
if (mode != HImode && mode != HFmode)
fatal_insn ("c4x_operand_subword: invalid mode", op);
present on external list. */
void
-c4x_global_label (name)
- const char *name;
+c4x_global_label (const char *name)
{
struct name_list *p, *last;
/* Add NAME to list of external symbols. */
void
-c4x_external_ref (name)
- const char *name;
+c4x_external_ref (const char *name)
{
struct name_list *p;
This is only required for ISRs if we are paranoid that someone
may have quietly changed this register on the sly. */
static void
-c4x_file_start ()
+c4x_file_start (void)
{
int dspversion = 0;
if (TARGET_C30) dspversion = 30;
static void
-c4x_file_end ()
+c4x_file_end (void)
{
struct name_list *p;
static void
-c4x_check_attribute (attrib, list, decl, attributes)
- const char *attrib;
- tree list, decl, *attributes;
+c4x_check_attribute (const char *attrib, tree list, tree decl, tree *attributes)
{
while (list != NULL_TREE
&& IDENTIFIER_POINTER (TREE_PURPOSE (list))
static void
-c4x_insert_attributes (decl, attributes)
- tree decl, *attributes;
+c4x_insert_attributes (tree decl, tree *attributes)
{
switch (TREE_CODE (decl))
{
/* Handle an attribute requiring a FUNCTION_TYPE;
arguments as in struct attribute_spec.handler. */
static tree
-c4x_handle_fntype_attribute (node, name, args, flags, no_add_attrs)
- tree *node;
- tree name;
- tree args ATTRIBUTE_UNUSED;
- int flags ATTRIBUTE_UNUSED;
- bool *no_add_attrs;
+c4x_handle_fntype_attribute (tree *node, tree name,
+ tree args ATTRIBUTE_UNUSED,
+ int flags ATTRIBUTE_UNUSED,
+ bool *no_add_attrs)
{
if (TREE_CODE (*node) != FUNCTION_TYPE)
{
/* !!! FIXME to emit RPTS correctly. */
int
-c4x_rptb_rpts_p (insn, op)
- rtx insn, op;
+c4x_rptb_rpts_p (rtx insn, rtx op)
{
/* The next insn should be our label marking where the
repeat block starts. */
/* Check if register r11 is used as the destination of an insn. */
static int
-c4x_r11_set_p(x)
- rtx x;
+c4x_r11_set_p(rtx x)
{
rtx set;
int i, j;
sets the r11 register. Check for this situation. */
int
-c4x_check_laj_p (insn)
- rtx insn;
+c4x_check_laj_p (rtx insn)
{
insn = prev_nonnote_insn (insn);
#define READ_USE_COST 2
static int
-c4x_adjust_cost (insn, link, dep_insn, cost)
- rtx insn;
- rtx link;
- rtx dep_insn;
- int cost;
+c4x_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
{
/* Don't worry about this until we know what registers have been
assigned. */
}
void
-c4x_init_builtins ()
+c4x_init_builtins (void)
{
tree endlink = void_list_node;
rtx
-c4x_expand_builtin (exp, target, subtarget, mode, ignore)
- tree exp;
- rtx target;
- rtx subtarget ATTRIBUTE_UNUSED;
- enum machine_mode mode ATTRIBUTE_UNUSED;
- int ignore ATTRIBUTE_UNUSED;
+c4x_expand_builtin (tree exp, rtx target,
+ rtx subtarget ATTRIBUTE_UNUSED,
+ enum machine_mode mode ATTRIBUTE_UNUSED,
+ int ignore ATTRIBUTE_UNUSED)
{
tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
}
static void
-c4x_asm_named_section (name, flags)
- const char *name;
- unsigned int flags ATTRIBUTE_UNUSED;
+c4x_asm_named_section (const char *name, unsigned int flags ATTRIBUTE_UNUSED)
{
fprintf (asm_out_file, "\t.sect\t\"%s\"\n", name);
}
static void
-c4x_globalize_label (stream, name)
- FILE *stream;
- const char *name;
+c4x_globalize_label (FILE *stream, const char *name)
{
default_globalize_label (stream, name);
c4x_global_label (name);
scanned. In either case, *TOTAL contains the cost result. */
static bool
-c4x_rtx_costs (x, code, outer_code, total)
- rtx x;
- int code, outer_code;
- int *total;
+c4x_rtx_costs (rtx x, int code, int outer_code, int *total)
{
HOST_WIDE_INT val;