arm64: dts: qcom: sa8775p-ride: enable the GNSS UART port

Enable the high-speed UART port connected to the GNSS controller on the
sa8775p-adp development board.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230309103752.173541-9-brgl@bgdev.pl

diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
index d01ca3a..cba7c81 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
+++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
@@ -13,6 +13,7 @@
 
        aliases {
                serial0 = &uart10;
+               serial1 = &uart12;
                i2c18 = &i2c18;
                spi16 = &spi16;
        };
@@ -66,6 +67,32 @@
                drive-strength = <2>;
                bias-pull-up;
        };
+
+       qup_uart12_default: qup-uart12-state {
+               qup_uart12_cts: qup-uart12-cts-pins {
+                       pins = "gpio52";
+                       function = "qup1_se5";
+                       bias-disable;
+               };
+
+               qup_uart12_rts: qup-uart12-rts-pins {
+                       pins = "gpio53";
+                       function = "qup1_se5";
+                       bias-pull-down;
+               };
+
+               qup_uart12_tx: qup-uart12-tx-pins {
+                       pins = "gpio54";
+                       function = "qup1_se5";
+                       bias-pull-up;
+               };
+
+               qup_uart12_rx: qup-uart12-rx-pins {
+                       pins = "gpio55";
+                       function = "qup1_se5";
+                       bias-pull-down;
+               };
+       };
 };
 
 &uart10 {
@@ -75,6 +102,12 @@
        status = "okay";
 };
 
+&uart12 {
+       pinctrl-0 = <&qup_uart12_default>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
 &xo_board_clk {
        clock-frequency = <38400000>;
 };