+2014-09-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/i386.exp: Run suffix-intel, x86-64-suffix and
+ x86-64-suffix-intel.
+
+ * gas/i386/suffix.s: Add tests for iret and sysret.
+ * gas/i386/suffix.d: Updated.
+
+ * gas/i386/suffix-intel.d: New file.
+ * gas/i386/x86-64-suffix-intel.d: Likewise.
+ * gas/i386/x86-64-suffix.d: Likewise.
+ * gas/i386/x86-64-suffix.s: Likewise.
+
2014-09-10 Alan Modra <amodra@gmail.com>
* gas/arm/got_prel.d: Adjust for changed section header placement.
run_dump_test "vmfunc"
run_dump_test "smx"
run_dump_test "suffix"
+ run_dump_test "suffix-intel"
run_dump_test "immed32"
run_dump_test "equ"
run_dump_test "divide"
run_dump_test "x86-64-avx512dq"
run_dump_test "x86-64-avx512dq_vl-intel"
run_dump_test "x86-64-avx512dq_vl"
+ run_dump_test "x86-64-suffix"
+ run_dump_test "x86-64-suffix-intel"
if { ![istarget "*-*-aix*"]
&& ![istarget "*-*-beos*"]
--- /dev/null
+#source: suffix.s
+#objdump: -dw -Msuffix,intel
+#name: i386 suffix (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ ]*[a-f0-9]+: 0f 01 c8 monitor
+[ ]*[a-f0-9]+: 0f 01 c9 mwait
+[ ]*[a-f0-9]+: 0f 01 c1 vmcall
+[ ]*[a-f0-9]+: 0f 01 c2 vmlaunch
+[ ]*[a-f0-9]+: 0f 01 c3 vmresume
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretd
+[ ]*[a-f0-9]+: cf iretd
+[ ]*[a-f0-9]+: 0f 07 sysretd
+[ ]*[a-f0-9]+: 0f 07 sysretd
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretd
+[ ]*[a-f0-9]+: cf iretd
+[ ]*[a-f0-9]+: 0f 07 sysretd
+[ ]*[a-f0-9]+: 0f 07 sysretd
+#pass
Disassembly of section .text:
-0+000 <foo>:
- 0: 0f 01 c8 [ ]*monitor %eax,%ecx,%edx
- 3: 0f 01 c9 [ ]*mwait %eax,%ecx
- 6: 0f 01 c1 [ ]*vmcall
- 9: 0f 01 c2 [ ]*vmlaunch
- c: 0f 01 c3 [ ]*vmresume
- f: 0f 01 c4 [ ]*vmxoff
- ...
+0+ <foo>:
+[ ]*[a-f0-9]+: 0f 01 c8 monitor %eax,%ecx,%edx
+[ ]*[a-f0-9]+: 0f 01 c9 mwait %eax,%ecx
+[ ]*[a-f0-9]+: 0f 01 c1 vmcall
+[ ]*[a-f0-9]+: 0f 01 c2 vmlaunch
+[ ]*[a-f0-9]+: 0f 01 c3 vmresume
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretl
+[ ]*[a-f0-9]+: cf iretl
+[ ]*[a-f0-9]+: 0f 07 sysretl
+[ ]*[a-f0-9]+: 0f 07 sysretl
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretl
+[ ]*[a-f0-9]+: cf iretl
+[ ]*[a-f0-9]+: 0f 07 sysretl
+[ ]*[a-f0-9]+: 0f 07 sysretl
+#pass
vmresume
vmxoff
- .p2align 4,0
+ iretw
+ iretl
+ iret
+ sysretl
+ sysret
+
+ .intel_syntax noprefix
+ iretw
+ iretd
+ iret
+ sysretd
+ sysret
--- /dev/null
+#source: x86-64-suffix.s
+#objdump: -dw -Msuffix,intel
+#name: x86-64 suffix (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ ]*[a-f0-9]+: 0f 01 c8 monitor
+[ ]*[a-f0-9]+: 0f 01 c9 mwait
+[ ]*[a-f0-9]+: 0f 01 c1 vmcall
+[ ]*[a-f0-9]+: 0f 01 c2 vmlaunch
+[ ]*[a-f0-9]+: 0f 01 c3 vmresume
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretd
+[ ]*[a-f0-9]+: cf iretd
+[ ]*[a-f0-9]+: 48 cf iretq
+[ ]*[a-f0-9]+: 0f 07 sysretd
+[ ]*[a-f0-9]+: 0f 07 sysretd
+[ ]*[a-f0-9]+: 48 0f 07 sysretq
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretd
+[ ]*[a-f0-9]+: cf iretd
+[ ]*[a-f0-9]+: 48 cf iretq
+[ ]*[a-f0-9]+: 0f 07 sysretd
+[ ]*[a-f0-9]+: 0f 07 sysretd
+[ ]*[a-f0-9]+: 48 0f 07 sysretq
+#pass
--- /dev/null
+#objdump: -dwMsuffix
+#name: x86-64 rep prefix (with suffixes)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ ]*[a-f0-9]+: 0f 01 c8 monitor %rax,%rcx,%rdx
+[ ]*[a-f0-9]+: 0f 01 c9 mwait %rax,%rcx
+[ ]*[a-f0-9]+: 0f 01 c1 vmcall
+[ ]*[a-f0-9]+: 0f 01 c2 vmlaunch
+[ ]*[a-f0-9]+: 0f 01 c3 vmresume
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretl
+[ ]*[a-f0-9]+: cf iretl
+[ ]*[a-f0-9]+: 48 cf iretq
+[ ]*[a-f0-9]+: 0f 07 sysretl
+[ ]*[a-f0-9]+: 0f 07 sysretl
+[ ]*[a-f0-9]+: 48 0f 07 sysretq
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretl
+[ ]*[a-f0-9]+: cf iretl
+[ ]*[a-f0-9]+: 48 cf iretq
+[ ]*[a-f0-9]+: 0f 07 sysretl
+[ ]*[a-f0-9]+: 0f 07 sysretl
+[ ]*[a-f0-9]+: 48 0f 07 sysretq
+#pass
--- /dev/null
+# Disassembling with -Msuffix.
+
+ .text
+foo:
+ monitor
+ mwait
+
+ vmcall
+ vmlaunch
+ vmresume
+ vmxoff
+
+ iretw
+ iretl
+ iret
+ iretq
+ sysretl
+ sysret
+ sysretq
+
+ .intel_syntax noprefix
+ iretw
+ iretd
+ iret
+ iretq
+ sysretd
+ sysret
+ sysretq
+2014-09-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (dis386): Replace "P" with "%LP" for iret and sysret.
+ (putop): Handle "%LP".
+
2014-09-03 Jiong Wang <jiong.wang@arm.com>
* aarch64-tbl.h (aarch64_opcode_table): Update encoding for mrs/msr.
"LS" => print "abs" in 64bit mode and behave as 'S' otherwise
"LV" => print "abs" for 64bit operand and behave as 'S' otherwise
"LW" => print 'd', 'q' depending on the VEX.W bit
+ "LP" => print 'w' or 'l' ('d' in Intel mode) if instruction has
+ an operand size prefix, or suffix_always is true. print
+ 'q' if rex prefix is present.
Many of the above letters print nothing in Intel mode. See "putop"
for the details.
{ "int3", { XX } },
{ "int", { Ib } },
{ X86_64_TABLE (X86_64_CE) },
- { "iretP", { XX } },
+ { "iret%LP", { XX } },
/* d0 */
{ REG_TABLE (REG_D0) },
{ REG_TABLE (REG_D1) },
{ Bad_Opcode },
{ "syscall", { XX } },
{ "clts", { XX } },
- { "sysretP", { XX } },
+ { "sysret%LP", { XX } },
/* 08 */
{ "invd", { XX } },
{ "wbinvd", { XX } },
break;
}
/* Fall through. */
+ goto case_P;
case 'P':
- if (intel_syntax)
+ if (l == 0 && len == 1)
{
- if ((rex & REX_W) == 0
- && (prefixes & PREFIX_DATA))
+case_P:
+ if (intel_syntax)
{
- if ((sizeflag & DFLAG) == 0)
- *obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
+ if ((rex & REX_W) == 0
+ && (prefixes & PREFIX_DATA))
+ {
+ if ((sizeflag & DFLAG) == 0)
+ *obufp++ = 'w';
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ }
+ break;
+ }
+ if ((prefixes & PREFIX_DATA)
+ || (rex & REX_W)
+ || (sizeflag & SUFFIX_ALWAYS))
+ {
+ USED_REX (REX_W);
+ if (rex & REX_W)
+ *obufp++ = 'q';
+ else
+ {
+ if (sizeflag & DFLAG)
+ *obufp++ = 'l';
+ else
+ *obufp++ = 'w';
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ }
}
- break;
}
- if ((prefixes & PREFIX_DATA)
- || (rex & REX_W)
- || (sizeflag & SUFFIX_ALWAYS))
+ else
{
- USED_REX (REX_W);
- if (rex & REX_W)
- *obufp++ = 'q';
- else
+ if (l != 1 || len != 2 || last[0] != 'L')
+ {
+ SAVE_LAST (*p);
+ break;
+ }
+
+ if ((prefixes & PREFIX_DATA)
+ || (rex & REX_W)
+ || (sizeflag & SUFFIX_ALWAYS))
{
- if (sizeflag & DFLAG)
- *obufp++ = 'l';
- else
- *obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
+ USED_REX (REX_W);
+ if (rex & REX_W)
+ *obufp++ = 'q';
+ else
+ {
+ if (sizeflag & DFLAG)
+ *obufp++ = intel_syntax ? 'd' : 'l';
+ else
+ *obufp++ = 'w';
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ }
}
}
break;