[PATCH AArch64] Fix aarch64_simd_valid_immediate for Bigendian

gcc/

	* config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Reverse
	order of elements for big-endian.

From-SVN: r208814

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3da0621..fef65b6 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2014-03-25  Alan Lawrence  <alan.lawrence@arm.com>
+
+       * config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Reverse
+       order of elements for big-endian.
+
 2014-03-25  Richard Biener  <rguenther@suse.de>
 
        PR middle-end/60635

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index ebd58c0..e839539 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -6566,7 +6566,9 @@ aarch64_simd_valid_immediate (rtx op, enum machine_mode mode, bool inverse,
   /* Splat vector constant out into a byte vector.  */
   for (i = 0; i < n_elts; i++)
     {
-      rtx el = CONST_VECTOR_ELT (op, i);
+      /* The vector is provided in gcc endian-neutral fashion.  For aarch64_be,
+         it must be laid out in the vector register in reverse order.  */
+      rtx el = CONST_VECTOR_ELT (op, BYTES_BIG_ENDIAN ? (n_elts - 1 - i) : i);
       unsigned HOST_WIDE_INT elpart;
       unsigned int part, parts;