======================================================================
Changes for U-Boot 1.1.3:
======================================================================
+* Patch by Jon Loeliger
+ Fix style issues primarily in 85xx and 83xx boards.
+ - C++ comments
+ - Trailing white space
+ - Indentation not by TAB
+ - Excessive amount of empty lines
+ - Trailing empty lines
+
+* Patch by Ron Alder, 11 July 2005
+ Add Xianghua Xiao and Lunsheng Wang's support for the
+ GDA MPC8540 EVAL board.
+
+* Patch by Eran Liberty
+ Add support for the Freescale MPC8349ADS board.
+
+* Patch by Jon Loeliger, 2005-07-25
+ Move the TSEC driver out of cpu/mpc85xx as it will be shared
+ by the upcoming mpc83xx family as well.
+
+* Patch by Jon Loeliger, 2005-05-05
+ Implemented support for MPC8548CDS board.
+ Added DDR II support based on SPD values for MPC85xx boards.
+ This roll-up patch also includes bugfies for the previously
+ published patches:
+ DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
+
+* Patch by Jon Loeliger, 2005-Feb-10
+ Add config option CONFIG_HAS_FEC calling out 8540 FEC features.
+
+* Patch by Jon Loeliger, Kumar Gala, 2005-02-08
+ For MPC85xxCDS:
+ Adds Relaxed Timing TRLX bit to FLASH ORx regs to allow
+ for faster flash parts.
+ Add documentation for BR/OR for FLASH.
+
+* Patch by Jon Loeliger 2005-02-08
+ Determine L2 Cache size dynamically on 85XX boards.
+
+* Patch by Jon Loeliger, Kumar Gala 2005-02-08
+ - Convert the CPM2 based functionality to use new CONFIG_CPM2
+ option rather than a myriad of CONFIG_MPC8560-like variants.
+ Applies to MPC85xx and MPC8260 boards, includes stxgp3 and sbc8560.
+ Eliminates the CONFIG_MPC8560 option entirely. Distributes the
+ new CONFIG_CPM2 option to each 8260 board.
+ * Patch by Stefan Roese, 01 Aug 2005:
+ - Major cleanup for AMCC eval boards Walnut, Bubinga, Ebony, Ocotea
+ (former IBM eval board). Please see "doc/README.AMCC-eval-boards-cleanup"
+ for details.
+ - Sycamore (PPC405GPr) eval board added (Walnut port is extended
+ to run on both 405GP and 405GPr eval boards).
+
+ * Patch by Steven Blakeslee, 27 Jul 2005:
+ - Add support for AMCC PPC440EP/GR.
+ - Add support for AMCC Yosemite PPC440EP eval board.
+ - Add support for AMCC Yellowstone PPC440GR eval board.
+
+ * Minor fixes for PPChameleon Board:
+ - fix alignment of NAND size
+ - make code do what the comment says
+
+ * Implement h/w sector protection status synchronization at boot.
+ The code is provided for, and was tested on, the Yukon/Alaska
+ and PM520 boards only.
+
+ A bug in flash_real_protect() for the Yukon board was fixed by
+ adding a function that tells if two banks are on one flash chip.
+
* Fix sysmon POST problem: check I2C error codes
This fixes a problem of displaying bogus voltages when the voltages
are so low that the I2C devices start failing while the rest of the
#########################################################################
LIST_4xx=" \
- ADCIOP AR405 ASH405 BUBINGA405EP \
+ ADCIOP AR405 ASH405 bubinga \
CANBT CPCI405 CPCI4052 CPCI405AB \
CPCI440 CPCIISER4 CRAYL1 csb272 \
csb472 DASA_SIM DP405 DU405 \
- EBONY ERIC EXBITGEN HUB405 \
+ ebony ERIC EXBITGEN HUB405 \
JSE MIP405 MIP405T ML2 \
- ml300 OCOTEA OCRTC ORSG \
+ ml300 ocotea OCRTC ORSG \
PCI405 PIP405 PLU405 PMC405 \
PPChameleonEVB VOH405 W7OLMC W7OLMG \
- WALNUT405 WUH405 XPEDITE1K \
+ walnut WUH405 XPEDITE1K yellowstone \
+ yosemite \
"
#########################################################################
"
#########################################################################
+## MPC83xx Systems (includes 8349, etc.)
+#########################################################################
+
+LIST_83xx=" \
+ MPC8349ADS \
+"
+
+
+#########################################################################
## MPC85xx Systems (includes 8540, 8560 etc.)
#########################################################################
LIST_85xx=" \
- MPC8540ADS MPC8541CDS MPC8555CDS MPC8560ADS \
- PM854 sbc8540 sbc8560 stxgp3 \
- TQM8540 \
+
+ MPC8540ADS MPC8540EVAL MPC8541CDS MPC8548CDS \
+ MPC8555CDS MPC8560ADS PM854 sbc8540 \
+ sbc8560 stxgp3 TQM8540 \
"
#########################################################################
LIST_ppc="${LIST_5xx} ${LIST_5xxx} \
${LIST_8xx} \
${LIST_8220} ${LIST_824x} ${LIST_8260} \
+ ${LIST_83xx} \
${LIST_85xx} \
${LIST_4xx} \
${LIST_74xx} ${LIST_7xx}"
for arg in $@
do
case "$arg" in
- ppc|5xx|5xxx|8xx|8220|824x|8260|85xx|4xx|7xx|74xx| \
+ ppc|5xx|5xxx|8xx|8220|824x|8260|83xx|85xx|4xx|7xx|74xx| \
arm|SA|ARM7|ARM9|ARM11|pxa|ixp| \
microblaze| \
mips| \
CROSS_COMPILE =
else
ifeq ($(ARCH),ppc)
-CROSS_COMPILE = ppc_8xx-
+CROSS_COMPILE = powerpc-linux-
endif
ifeq ($(ARCH),arm)
CROSS_COMPILE = arm-linux-
ifeq ($(CPU),ppc4xx)
OBJS += cpu/$(CPU)/resetvec.o
endif
+ifeq ($(CPU),mpc83xx)
+OBJS += cpu/$(CPU)/resetvec.o
+endif
ifeq ($(CPU),mpc85xx)
OBJS += cpu/$(CPU)/resetvec.o
endif
ASH405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ash405 esd
- BUBINGA405EP_config: unconfig
- @./mkconfig $(@:_config=) ppc ppc4xx bubinga405ep
+ bamboo_config: unconfig
+ @./mkconfig $(@:_config=) ppc ppc4xx bamboo amcc
+
+ bubinga_config: unconfig
+ @./mkconfig $(@:_config=) ppc ppc4xx bubinga amcc
CANBT_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx canbt esd
DU405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx du405 esd
- EBONY_config: unconfig
- @./mkconfig $(@:_config=) ppc ppc4xx ebony
+ ebony_config: unconfig
+ @./mkconfig $(@:_config=) ppc ppc4xx ebony amcc
ERIC_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx eric
ml300_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ml300 xilinx
- OCOTEA_config: unconfig
- @./mkconfig $(@:_config=) ppc ppc4xx ocotea
+ ocotea_config: unconfig
+ @./mkconfig $(@:_config=) ppc ppc4xx ocotea amcc
OCRTC_config \
ORSG_config: unconfig
sbc405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx sbc405
+ sycamore_config: unconfig
+ @echo "Configuring for sycamore board as subset of walnut..."
+ @./mkconfig -a walnut ppc ppc4xx walnut amcc
+
VOH405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx voh405 esd
W7OLMG_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx w7o
- WALNUT405_config: unconfig
- @./mkconfig $(@:_config=) ppc ppc4xx walnut405
+ walnut_config: unconfig
+ @./mkconfig $(@:_config=) ppc ppc4xx walnut amcc
WUH405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx wuh405 esd
XPEDITE1K_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx xpedite1k
+ yosemite_config: unconfig
+ @./mkconfig $(@:_config=) ppc ppc4xx yosemite amcc
+
+ yellowstone_config: unconfig
+ @./mkconfig $(@:_config=) ppc ppc4xx yellowstone amcc
+
#########################################################################
## MPC8220 Systems
#########################################################################
@./mkconfig $(@:_config=) m68k mcf52x2 tasreg esd
#########################################################################
+## MPC83xx Systems
+#########################################################################
+
+MPC8349ADS_config: unconfig
+ @./mkconfig $(@:_config=) ppc mpc83xx mpc8349ads
+
+#########################################################################
## MPC85xx Systems
#########################################################################
MPC8540ADS_config: unconfig
@./mkconfig $(@:_config=) ppc mpc85xx mpc8540ads
+MPC8540EVAL_config \
+MPC8540EVAL_33_config \
+MPC8540EVAL_66_config \
+MPC8540EVAL_33_slave_config \
+MPC8540EVAL_66_slave_config: unconfig
+ @echo "" >include/config.h ; \
+ if [ "$(findstring _33_,$@)" ] ; then \
+ echo -n "... 33 MHz PCI" ; \
+ else \
+ echo "#define CONFIG_SYSCLK_66M" >>include/config.h ; \
+ echo -n "... 66 MHz PCI" ; \
+ fi ; \
+ if [ "$(findstring _slave_,$@)" ] ; then \
+ echo "#define CONFIG_PCI_SLAVE" >>include/config.h ; \
+ echo " slave" ; \
+ else \
+ echo " host" ; \
+ fi
+ @./mkconfig -a MPC8540EVAL ppc mpc85xx mpc8540eval
+
MPC8560ADS_config: unconfig
@./mkconfig $(@:_config=) ppc mpc85xx mpc8560ads
MPC8541CDS_config: unconfig
@./mkconfig $(@:_config=) ppc mpc85xx mpc8541cds cds
+MPC8548CDS_config: unconfig
+ @./mkconfig $(@:_config=) ppc mpc85xx mpc8548cds cds
+
MPC8555CDS_config: unconfig
@./mkconfig $(@:_config=) ppc mpc85xx mpc8555cds cds
CONFIG_EBONY CONFIG_MOUSSE CONFIG_SXNI855T
CONFIG_ELPPC CONFIG_MPC8260ADS CONFIG_TQM823L
CONFIG_ELPT860 CONFIG_MPC8540ADS CONFIG_TQM8260
- CONFIG_ep8260 CONFIG_MPC8560ADS CONFIG_TQM850L
- CONFIG_ERIC CONFIG_MUSENKI CONFIG_TQM855L
- CONFIG_ESTEEM192E CONFIG_MVS1 CONFIG_TQM860L
- CONFIG_ETX094 CONFIG_NETPHONE CONFIG_TTTech
- CONFIG_EVB64260 CONFIG_NETTA CONFIG_UTX8245
- CONFIG_FADS823 CONFIG_NETVIA CONFIG_V37
- CONFIG_FADS850SAR CONFIG_NX823 CONFIG_W7OLMC
- CONFIG_FADS860T CONFIG_OCRTC CONFIG_W7OLMG
- CONFIG_FLAGADM CONFIG_ORSG CONFIG_WALNUT
- CONFIG_FPS850L CONFIG_OXC CONFIG_ZPC1900
- CONFIG_FPS860L CONFIG_ZUMA
+ CONFIG_ep8260 CONFIG_MPC8540EVAL CONFIG_TQM850L
+ CONFIG_ERIC CONFIG_MPC8560ADS CONFIG_TQM855L
+ CONFIG_ESTEEM192E CONFIG_MUSENKI CONFIG_TQM860L
+ CONFIG_ETX094 CONFIG_MVS1 CONFIG_TTTech
+ CONFIG_EVB64260 CONFIG_NETPHONE CONFIG_UTX8245
+ CONFIG_FADS823 CONFIG_NETTA CONFIG_V37
+ CONFIG_FADS850SAR CONFIG_NETVIA CONFIG_W7OLMC
+ CONFIG_FADS860T CONFIG_NX823 CONFIG_W7OLMG
- CONFIG_FLAGADM CONFIG_OCRTC CONFIG_WALNUT405
++ CONFIG_FLAGADM CONFIG_OCRTC CONFIG_WALNUT
+ CONFIG_FPS850L CONFIG_ORSG CONFIG_ZPC1900
+ CONFIG_FPS860L CONFIG_OXC CONFIG_ZUMA
ARM based boards:
-----------------
DUET_ADS_config MBX_config sbc8560_66_config
EBONY_config MPC8260ADS_config SM850_config
ELPT860_config MPC8540ADS_config SPD823TS_config
- ESTEEM192E_config MPC8560ADS_config stxgp3_config
- ETX094_config NETVIA_config SXNI855T_config
- FADS823_config omap1510inn_config TQM823L_config
- FADS850SAR_config omap1610h2_config TQM850L_config
- FADS860T_config omap1610inn_config TQM855L_config
- FPS850L_config omap5912osk_config TQM860L_config
- omap2420h4_config walnut_config
- Yukon8220_config
+ ESTEEM192E_config MPC8540EVAL_config stxgp3_config
+ ETX094_config MPC8560ADS_config SXNI855T_config
+ FADS823_config NETVIA_config TQM823L_config
+ FADS850SAR_config omap1510inn_config TQM850L_config
+ FADS860T_config omap1610h2_config TQM855L_config
+ FPS850L_config omap1610inn_config TQM860L_config
- omap5912osk_config WALNUT405_config
++ omap5912osk_config walnut_config
+ omap2420h4_config Yukon8220_config
ZPC1900_config
Note: for some board special configuration names may exist; check if
CFG_INIT_RAM_ADDR should be somewhere that won't interfere
with your processor/board/system design. The default value
you will find in any recent u-boot distribution in
- Walnut405.h should work for you. I'd set it to a value larger
+ walnut.h should work for you. I'd set it to a value larger
than your SDRAM module. If you have a 64MB SDRAM module, set
it above 400_0000. Just make sure your board has no resources
that are supposed to respond to that address! That code in
#endif
print_num ("bootflags", bd->bi_bootflags );
#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
- defined(CONFIG_405EP) || defined(CONFIG_XILINX_ML300)
+ defined(CONFIG_405EP) || defined(CONFIG_XILINX_ML300) || \
+ defined(CONFIG_440_EP) || defined(CONFIG_440_GR)
print_str ("procfreq", strmhz(buf, bd->bi_procfreq));
print_str ("plb_busfreq", strmhz(buf, bd->bi_plb_busfreq));
- #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_XILINX_ML300)
+ #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_XILINX_ML300) || \
+ defined(CONFIG_440_EP) || defined(CONFIG_440_GR)
print_str ("pci_busfreq", strmhz(buf, bd->bi_pci_busfreq));
#endif
- #else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_ML300 */
+ #else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_ML300, CONFIG_440_EP CONFIG_440_GR */
-#if defined(CONFIG_8260) || defined(CONFIG_MPC8560)
+#if defined(CONFIG_CPM2)
print_str ("vco", strmhz(buf, bd->bi_vco));
print_str ("sccfreq", strmhz(buf, bd->bi_sccfreq));
print_str ("brgfreq", strmhz(buf, bd->bi_brgfreq));
#endif
print_str ("intfreq", strmhz(buf, bd->bi_intfreq));
-#if defined(CONFIG_8260) || defined(CONFIG_MPC8560)
+#if defined(CONFIG_CPM2)
print_str ("cpmfreq", strmhz(buf, bd->bi_cpmfreq));
#endif
print_str ("busfreq", strmhz(buf, bd->bi_busfreq));
- #endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_ML300 */
+ #endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_ML300, CONFIG_440_EP CONFIG_440_GR */
#if defined(CONFIG_MPC8220)
print_str ("inpfreq", strmhz(buf, bd->bi_inpfreq));
print_str ("flbfreq", strmhz(buf, bd->bi_flbfreq));
#define SPRN_HASH1 0x3D2 /* Primary Hash Address Register */
#define SPRN_HASH2 0x3D3 /* Secondary Hash Address Resgister */
#define SPRN_HID0 0x3F0 /* Hardware Implementation Register 0 */
+
+#define HID0_ICE_SHIFT 15
+#define HID0_DCE_SHIFT 14
+#define HID0_DLOCK_SHIFT 12
+
#define HID0_EMCP (1<<31) /* Enable Machine Check pin */
#define HID0_EBA (1<<29) /* Enable Bus Address Parity */
#define HID0_EBD (1<<28) /* Enable Bus Data Parity */
#define HID0_NAP (1<<22)
#define HID0_SLEEP (1<<21)
#define HID0_DPM (1<<20)
-#define HID0_ICE (1<<15) /* Instruction Cache Enable */
-#define HID0_DCE (1<<14) /* Data Cache Enable */
+#define HID0_ICE (1<<HID0_ICE_SHIFT) /* Instruction Cache Enable */
+#define HID0_DCE (1<<HID0_DCE_SHIFT) /* Data Cache Enable */
#define HID0_ILOCK (1<<13) /* Instruction Cache Lock */
-#define HID0_DLOCK (1<<12) /* Data Cache Lock */
+#define HID0_DLOCK (1<<HID0_DLOCK_SHIFT) /* Data Cache Lock */
#define HID0_ICFI (1<<11) /* Instr. Cache Flash Invalidate */
#define HID0_DCFI (1<<10) /* Data Cache Flash Invalidate */
#define HID0_DCI HID0_DCFI
#define SPRN_MAS4 0x274 /* MMU Assist Register 4 */
#define SPRN_MAS5 0x275 /* MMU Assist Register 5 */
#define SPRN_MAS6 0x276 /* MMU Assist Register 6 */
+#define SPRN_MAS7 0x3B0 /* MMU Assist Register 7 */
#define SPRN_IVOR32 0x210 /* Interrupt Vector Offset Register 32 */
#define SPRN_IVOR33 0x211 /* Interrupt Vector Offset Register 33 */
#define MAS4 SPRN_MAS4
#define MAS5 SPRN_MAS5
#define MAS6 SPRN_MAS6
+#define MAS7 SPRN_MAS7
/* Device Control Registers */
#define PVR_405GPR_RB 0x50910951
#define PVR_440GP_RB 0x40120440
#define PVR_440GP_RC 0x40120481
+ #define PVR_440EP_RA 0x42221850
+ #define PVR_440EP_RB 0x422218D3
#define PVR_440GX_RA 0x51B21850
#define PVR_440GX_RB 0x51B21851
#define PVR_440GX_RC 0x51B21892
#define SVR_8560 0x8070
#define SVR_8555 0x8079
#define SVR_8541 0x807A
+#define SVR_8548 0x8031
+#define SVR_8548_E 0x8039
/* I am just adding a single entry for 8260 boards. I think we may be
#if defined(CONFIG_MPC5xxx)
unsigned long bi_mbar_base; /* base of internal registers */
#endif
+#if defined(CONFIG_MPC83XX)
+ unsigned long bi_immrbar;
+#endif
#if defined(CONFIG_MPC8220)
unsigned long bi_mbar_base; /* base of internal registers */
unsigned long bi_inpfreq; /* Input Freq, In MHz */
unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
unsigned long bi_intfreq; /* Internal Freq, in MHz */
unsigned long bi_busfreq; /* Bus Freq, in MHz */
-#if defined(CONFIG_8260) || defined(CONFIG_MPC8560)
+#if defined(CONFIG_CPM2)
unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
unsigned char bi_enet3addr[6];
#endif
- #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined (CONFIG_440_GX)
+ #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined (CONFIG_440_GX) || \
+ defined(CONFIG_440_EP) || defined(CONFIG_440_GR)
unsigned int bi_opbfreq; /* OPB clock in Hz */
int bi_iic_fast[2]; /* Use fast i2c mode */
#endif
#if defined(CONFIG_NX823)
unsigned char bi_sernum[8];
#endif
+ #if defined(CONFIG_440_EP) || defined(CONFIG_440_GR)
+ int bi_phynum[2]; /* Determines phy mapping */
+ int bi_phymode[2]; /* Determines phy mode */
+ #endif
#if defined(CONFIG_440_GX)
int bi_phynum[4]; /* Determines phy mapping */
int bi_phymode[4]; /* Determines phy mode */
#include <net.h>
#include <serial.h>
#ifdef CFG_ALLOC_DPRAM
-#if !(defined(CONFIG_8260)||defined(CONFIG_MPC8560))
+#if !defined(CONFIG_CPM2)
#include <commproc.h>
#endif
#endif
init_timebase,
#endif
#ifdef CFG_ALLOC_DPRAM
-#if !(defined(CONFIG_8260) || defined(CONFIG_MPC8560))
+#if !defined(CONFIG_CPM2)
dpram_init,
#endif
#endif
prt_8260_rsr,
prt_8260_clks,
#endif /* CONFIG_8260 */
+
+#if defined(CONFIG_MPC83XX)
+ print_clock_conf,
+#endif
+
checkcpu,
#if defined(CONFIG_MPC5xxx)
prt_mpc5xxx_clks,
/* compiler optimization barrier needed for GCC >= 3.4 */
__asm__ __volatile__("": : :"memory");
-#if !(defined(CONFIG_8260) || defined(CONFIG_MPC8560))
+#if !defined(CONFIG_CPM2)
/* Clear initial global data */
memset ((void *) gd, 0, sizeof (gd_t));
#endif
#if defined(CONFIG_MPC5xxx)
bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
#endif
+#if defined(CONFIG_MPC83XX)
+ bd->bi_immrbar = CFG_IMMRBAR;
+#endif
#if defined(CONFIG_MPC8220)
bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
bd->bi_inpfreq = gd->inp_clk;
WATCHDOG_RESET ();
bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
-#if defined(CONFIG_8260) || defined(CONFIG_MPC8560)
+#if defined(CONFIG_CPM2)
bd->bi_cpmfreq = gd->cpm_clk;
bd->bi_brgfreq = gd->brg_clk;
bd->bi_sccfreq = gd->scc_clk;
bd->bi_vco = gd->vco_out;
-#endif /* CONFIG_8260 */
+#endif /* CONFIG_CPM2 */
#if defined(CONFIG_MPC5xxx)
bd->bi_ipbfreq = gd->ipb_clk;
bd->bi_pcifreq = gd->pci_clk;
bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
bd->bi_plb_busfreq = gd->bus_clk;
- #if defined(CONFIG_405GP) || defined(CONFIG_405EP)
+ #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_440_EP) || defined(CONFIG_440_GR)
bd->bi_pci_busfreq = get_PCI_freq ();
bd->bi_opbfreq = get_OPB_freq ();
#elif defined(CONFIG_XILINX_ML300)