mlxsw: Trap ARP packets at layer 3 instead of layer 2
authorAmit Cohen <amcohen@nvidia.com>
Thu, 16 Jun 2022 10:42:35 +0000 (13:42 +0300)
committerDavid S. Miller <davem@davemloft.net>
Fri, 17 Jun 2022 09:31:33 +0000 (10:31 +0100)
Currently, the traps 'ARP_REQUEST' and 'ARP_RESPONSE' occur at layer 2.
To allow the packets to be flooded, they are configured with the action
'MIRROR_TO_CPU' which means that the CPU receives a replica of the packet.

Today, Spectrum ASICs also support trapping ARP packets at layer 3. This
behavior is better, then the packets can just be trapped and there is no
need to mirror them. An additional motivation is that using the traps at
layer 2, the ARP packets are dropped in the router as they do not have an
IP header, then they are counted as error packets, which might confuse
users.

Add the relevant traps for layer 3 and use them instead of the existing
traps. There is no visible change to user space.

Signed-off-by: Amit Cohen <amcohen@nvidia.com>
Reviewed-by: Petr Machata <petrm@nvidia.com>
Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c
drivers/net/ethernet/mellanox/mlxsw/trap.h

index ed4d0d3448f31bda512a9b5b3f5fe8c033814b69..d0baba38d2a3ef4fa52ba86fc534783f28884253 100644 (file)
@@ -953,16 +953,16 @@ static const struct mlxsw_sp_trap_item mlxsw_sp_trap_items_arr[] = {
                .trap = MLXSW_SP_TRAP_CONTROL(ARP_REQUEST, NEIGH_DISCOVERY,
                                              MIRROR),
                .listeners_arr = {
-                       MLXSW_SP_RXL_MARK(ARPBC, NEIGH_DISCOVERY, MIRROR_TO_CPU,
-                                         false),
+                       MLXSW_SP_RXL_MARK(ROUTER_ARPBC, NEIGH_DISCOVERY,
+                                         TRAP_TO_CPU, false),
                },
        },
        {
                .trap = MLXSW_SP_TRAP_CONTROL(ARP_RESPONSE, NEIGH_DISCOVERY,
                                              MIRROR),
                .listeners_arr = {
-                       MLXSW_SP_RXL_MARK(ARPUC, NEIGH_DISCOVERY, MIRROR_TO_CPU,
-                                         false),
+                       MLXSW_SP_RXL_MARK(ROUTER_ARPUC, NEIGH_DISCOVERY,
+                                         TRAP_TO_CPU, false),
                },
        },
        {
index d888498aed33356115c82837aa03273ee5ef87cd..8da169663bda62e9dc1e2aee223f836b4394c07a 100644 (file)
@@ -27,8 +27,6 @@ enum {
        MLXSW_TRAP_ID_PKT_SAMPLE = 0x38,
        MLXSW_TRAP_ID_FID_MISS = 0x3D,
        MLXSW_TRAP_ID_DECAP_ECN0 = 0x40,
-       MLXSW_TRAP_ID_ARPBC = 0x50,
-       MLXSW_TRAP_ID_ARPUC = 0x51,
        MLXSW_TRAP_ID_MTUERROR = 0x52,
        MLXSW_TRAP_ID_TTLERROR = 0x53,
        MLXSW_TRAP_ID_LBERROR = 0x54,
@@ -71,6 +69,8 @@ enum {
        MLXSW_TRAP_ID_IPV6_BFD = 0xD1,
        MLXSW_TRAP_ID_ROUTER_ALERT_IPV4 = 0xD6,
        MLXSW_TRAP_ID_ROUTER_ALERT_IPV6 = 0xD7,
+       MLXSW_TRAP_ID_ROUTER_ARPBC = 0xE0,
+       MLXSW_TRAP_ID_ROUTER_ARPUC = 0xE1,
        MLXSW_TRAP_ID_DISCARD_NON_ROUTABLE = 0x11A,
        MLXSW_TRAP_ID_DISCARD_ROUTER2 = 0x130,
        MLXSW_TRAP_ID_DISCARD_ROUTER3 = 0x131,