drm/amd/display: log vertical interrupt 1 for debug
authorJosip Pavic <Josip.Pavic@amd.com>
Fri, 9 Sep 2022 18:18:31 +0000 (14:18 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 19 Sep 2022 19:16:33 +0000 (15:16 -0400)
[Why & How]
Extend existing OTG state collection function to include the vertical
interrupt 1 state.

Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h

index 2948279..ea77392 100644 (file)
@@ -1393,6 +1393,12 @@ void optc1_read_otg_state(struct optc *optc1,
        REG_GET(OPTC_INPUT_GLOBAL_CONTROL,
                        OPTC_UNDERFLOW_OCCURRED_STATUS, &s->underflow_occurred_status);
 
+       REG_GET(OTG_VERTICAL_INTERRUPT1_CONTROL,
+                       OTG_VERTICAL_INTERRUPT1_INT_ENABLE, &s->vertical_interrupt1_en);
+
+       REG_GET(OTG_VERTICAL_INTERRUPT1_POSITION,
+                               OTG_VERTICAL_INTERRUPT1_LINE_START, &s->vertical_interrupt1_line);
+
        REG_GET(OTG_VERTICAL_INTERRUPT2_CONTROL,
                        OTG_VERTICAL_INTERRUPT2_INT_ENABLE, &s->vertical_interrupt2_en);
 
index 3fe5882..6323ca6 100644 (file)
@@ -583,6 +583,8 @@ struct dcn_otg_state {
        uint32_t underflow_occurred_status;
        uint32_t otg_enabled;
        uint32_t blank_enabled;
+       uint32_t vertical_interrupt1_en;
+       uint32_t vertical_interrupt1_line;
        uint32_t vertical_interrupt2_en;
        uint32_t vertical_interrupt2_line;
 };