drm/i915: s/LFP/LPF in DPIO PLL register names
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 14 Jun 2013 11:02:53 +0000 (14:02 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 1 Jul 2013 09:14:52 +0000 (11:14 +0200)
LPF is short for "low pass filter".

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_display.c

index f72d5a3..04cf6c0 100644 (file)
@@ -1862,10 +1862,10 @@ static int i915_dpio_info(struct seq_file *m, void *data)
        seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
                   vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
 
-       seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
-                  vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
-       seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
-                  vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
+       seq_printf(m, "DPIO_LPF_COEFF_A: 0x%08x\n",
+                  vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_A));
+       seq_printf(m, "DPIO_LPF_COEFF_B: 0x%08x\n",
+                  vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_B));
 
        seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
                   vlv_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
index 137be4c..b6f1fd9 100644 (file)
 #define _DPIO_PLL_CML_B                        0x806c
 #define DPIO_PLL_CML(pipe) _PIPE(pipe, _DPIO_PLL_CML_A, _DPIO_PLL_CML_B)
 
-#define _DPIO_LFP_COEFF_A              0x8048
-#define _DPIO_LFP_COEFF_B              0x8068
-#define DPIO_LFP_COEFF(pipe) _PIPE(pipe, _DPIO_LFP_COEFF_A, _DPIO_LFP_COEFF_B)
+#define _DPIO_LPF_COEFF_A              0x8048
+#define _DPIO_LPF_COEFF_B              0x8068
+#define DPIO_LPF_COEFF(pipe) _PIPE(pipe, _DPIO_LPF_COEFF_A, _DPIO_LPF_COEFF_B)
 
 #define DPIO_CALIBRATION               0x80ac
 
index 749d428..85f3eb7 100644 (file)
@@ -4406,10 +4406,10 @@ static void vlv_update_pll(struct intel_crtc *crtc)
        if (crtc->config.port_clock == 162000 ||
            intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_ANALOG) ||
            intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI))
-               vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe),
+               vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe),
                                 0x005f0021);
        else
-               vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe),
+               vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe),
                                 0x00d0000f);
 
        if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP) ||