ARM: dts: bcm2835: Add the DSI module nodes and clocks.
authorEric Anholt <eric@anholt.net>
Tue, 13 Dec 2016 23:15:10 +0000 (15:15 -0800)
committerEric Anholt <eric@anholt.net>
Mon, 6 Mar 2017 17:19:21 +0000 (09:19 -0800)
The modules stay disabled by default, and if you want to enable DSI
you'll need an overlay that connects a panel to it.

Signed-off-by: Eric Anholt <eric@anholt.net>
arch/arm/boot/dts/bcm2835-rpi.dtsi
arch/arm/boot/dts/bcm283x.dtsi

index 38e6050..1e41419 100644 (file)
        power-domains = <&power RPI_POWER_DOMAIN_VEC>;
        status = "okay";
 };
+
+&dsi0 {
+       power-domains = <&power RPI_POWER_DOMAIN_DSI0>;
+};
+
+&dsi1 {
+       power-domains = <&power RPI_POWER_DOMAIN_DSI1>;
+};
index a3106aa..9798bc9 100644 (file)
                        #clock-cells = <1>;
                        reg = <0x7e101000 0x2000>;
 
-                       /* CPRMAN derives everything from the platform's
-                        * oscillator.
+                       /* CPRMAN derives almost everything from the
+                        * platform's oscillator.  However, the DSI
+                        * pixel clocks come from the DSI analog PHY.
                         */
-                       clocks = <&clk_osc>;
+                       clocks = <&clk_osc>,
+                               <&dsi0 0>, <&dsi0 1>, <&dsi0 2>,
+                               <&dsi1 0>, <&dsi1 1>, <&dsi1 2>;
                };
 
                rng@7e104000 {
                        interrupts = <2 14>; /* pwa1 */
                };
 
+               dsi0: dsi@7e209000 {
+                       compatible = "brcm,bcm2835-dsi0";
+                       reg = <0x7e209000 0x78>;
+                       interrupts = <2 4>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       #clock-cells = <1>;
+
+                       clocks = <&clocks BCM2835_PLLA_DSI0>,
+                                <&clocks BCM2835_CLOCK_DSI0E>,
+                                <&clocks BCM2835_CLOCK_DSI0P>;
+                       clock-names = "phy", "escape", "pixel";
+
+                       clock-output-names = "dsi0_byte",
+                                            "dsi0_ddr2",
+                                            "dsi0_ddr";
+
+               };
+
                thermal: thermal@7e212000 {
                        compatible = "brcm,bcm2835-thermal";
                        reg = <0x7e212000 0x8>;
                        interrupts = <2 1>;
                };
 
+               dsi1: dsi@7e700000 {
+                       compatible = "brcm,bcm2835-dsi1";
+                       reg = <0x7e700000 0x8c>;
+                       interrupts = <2 12>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       #clock-cells = <1>;
+
+                       clocks = <&clocks BCM2835_PLLD_DSI1>,
+                                <&clocks BCM2835_CLOCK_DSI1E>,
+                                <&clocks BCM2835_CLOCK_DSI1P>;
+                       clock-names = "phy", "escape", "pixel";
+
+                       clock-output-names = "dsi1_byte",
+                                            "dsi1_ddr2",
+                                            "dsi1_ddr";
+
+                       status = "disabled";
+               };
+
                i2c1: i2c@7e804000 {
                        compatible = "brcm,bcm2835-i2c";
                        reg = <0x7e804000 0x1000>;