pwm: lpc32xx: Remove handling of PWM channels

Because LPC32xx PWM controllers have only a single output which is
registered as the only PWM device/channel per controller, it is known in
advance that pwm->hwpwm value is always 0. On basis of this fact
simplify the code by removing operations with pwm->hwpwm, there is no
controls which require channel number as input.

Even though I wasn't aware at the time when I forward ported that patch,
this fixes a null pointer dereference as lpc32xx->chip.pwms is NULL
before devm_pwmchip_add() is called.

Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Fixes: 3d2813fb17e5 ("pwm: lpc32xx: Don't modify HW state in .probe() after the PWM chip was registered")
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>

diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
index 86a0ea0..806f0bb 100644 (file)
--- a/drivers/pwm/pwm-lpc32xx.c
+++ b/drivers/pwm/pwm-lpc32xx.c
@@ -51,10 +51,10 @@ static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
        if (duty_cycles > 255)
                duty_cycles = 255;
 
-       val = readl(lpc32xx->base + (pwm->hwpwm << 2));
+       val = readl(lpc32xx->base);
        val &= ~0xFFFF;
        val |= (period_cycles << 8) | duty_cycles;
-       writel(val, lpc32xx->base + (pwm->hwpwm << 2));
+       writel(val, lpc32xx->base);
 
        return 0;
 }
@@ -69,9 +69,9 @@ static int lpc32xx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
        if (ret)
                return ret;
 
-       val = readl(lpc32xx->base + (pwm->hwpwm << 2));
+       val = readl(lpc32xx->base);
        val |= PWM_ENABLE;
-       writel(val, lpc32xx->base + (pwm->hwpwm << 2));
+       writel(val, lpc32xx->base);
 
        return 0;
 }
@@ -81,9 +81,9 @@ static void lpc32xx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
        struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip);
        u32 val;
 
-       val = readl(lpc32xx->base + (pwm->hwpwm << 2));
+       val = readl(lpc32xx->base);
        val &= ~PWM_ENABLE;
-       writel(val, lpc32xx->base + (pwm->hwpwm << 2));
+       writel(val, lpc32xx->base);
 
        clk_disable_unprepare(lpc32xx->clk);
 }
@@ -141,9 +141,9 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
        lpc32xx->chip.npwm = 1;
 
        /* If PWM is disabled, configure the output to the default value */
-       val = readl(lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
+       val = readl(lpc32xx->base);
        val &= ~PWM_PIN_LEVEL;
-       writel(val, lpc32xx->base + (lpc32xx->chip.pwms[0].hwpwm << 2));
+       writel(val, lpc32xx->base);
 
        ret = devm_pwmchip_add(&pdev->dev, &lpc32xx->chip);
        if (ret < 0) {