pinctrl: Add i.MX7ULP pinctrl driver

Add i.MX7ULP pinctrl driver.
Select CONFIG_PINCTRL_IMX7ULP to use this driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by : Stefano Babic <sbabic@denx.de>

diff --git a/drivers/pinctrl/nxp/Kconfig b/drivers/pinctrl/nxp/Kconfig
index 238f77d..b668359 100644 (file)
--- a/drivers/pinctrl/nxp/Kconfig
+++ b/drivers/pinctrl/nxp/Kconfig
@@ -42,3 +42,17 @@ config PINCTRL_IMX7
          configuration. This driver is different from the linux one,
          this is a simple implementation, only parses the 'fsl,pins'
          property and configure related registers.
+
+config PINCTRL_IMX7ULP
+       bool "IMX7ULP pinctrl driver"
+       depends on ARCH_MX7ULP && PINCTRL_FULL
+       select DEVRES
+       select PINCTRL_IMX
+       help
+         Say Y here to enable the imx7ulp pinctrl driver
+
+         This provides a simple pinctrl driver for i.MX7ULP SoC familiy.
+         This feature depends on device tree configuration. This driver
+         is different from the linux one, this is a simple implementation,
+         only parses the 'fsl,pins' property and configure related
+         registers.

diff --git a/drivers/pinctrl/nxp/Makefile b/drivers/pinctrl/nxp/Makefile
index e0f7325..c763948 100644 (file)
--- a/drivers/pinctrl/nxp/Makefile
+++ b/drivers/pinctrl/nxp/Makefile
@@ -2,3 +2,4 @@ obj-$(CONFIG_PINCTRL_IMX)               += pinctrl-imx.o
 obj-$(CONFIG_PINCTRL_IMX5)             += pinctrl-imx5.o
 obj-$(CONFIG_PINCTRL_IMX6)             += pinctrl-imx6.o
 obj-$(CONFIG_PINCTRL_IMX7)             += pinctrl-imx7.o
+obj-$(CONFIG_PINCTRL_IMX7ULP)          += pinctrl-imx7ulp.o

diff --git a/drivers/pinctrl/nxp/pinctrl-imx.c b/drivers/pinctrl/nxp/pinctrl-imx.c
index e130faf..f0321c4 100644 (file)
--- a/drivers/pinctrl/nxp/pinctrl-imx.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx.c
@@ -24,6 +24,7 @@ static int imx_pinctrl_set_state(struct udevice *dev, struct udevice *config)
        u32 *pin_data;
        int npins, size, pin_size;
        int mux_reg, conf_reg, input_reg, input_val, mux_mode, config_val;
+       u32 mux_shift = info->mux_mask ? ffs(info->mux_mask) - 1 : 0;
        int i, j = 0;
 
        dev_dbg(dev, "%s: %s\n", __func__, config->name);
@@ -97,8 +98,8 @@ static int imx_pinctrl_set_state(struct udevice *dev, struct udevice *config)
 
                /* Set Mux */
                if (info->flags & SHARE_MUX_CONF_REG) {
-                       clrsetbits_le32(info->base + mux_reg, 0x7 << 20,
-                                       mux_mode << 20);
+                       clrsetbits_le32(info->base + mux_reg, info->mux_mask,
+                                       mux_mode << mux_shift);
                } else {
                        writel(mux_mode, info->base + mux_reg);
                }
@@ -154,8 +155,8 @@ static int imx_pinctrl_set_state(struct udevice *dev, struct udevice *config)
                /* Set config */
                if (!(config_val & IMX_NO_PAD_CTL)) {
                        if (info->flags & SHARE_MUX_CONF_REG) {
-                               clrsetbits_le32(info->base + conf_reg, 0xffff,
-                                               config_val);
+                               clrsetbits_le32(info->base + conf_reg,
+                                               info->mux_mask, config_val);
                        } else {
                                writel(config_val, info->base + conf_reg);
                        }
@@ -200,6 +201,7 @@ int imx_pinctrl_probe(struct udevice *dev,
                return -ENOMEM;
        priv->info = info;
 
+       info->mux_mask = fdtdec_get_int(gd->fdt_blob, node, "fsl,mux_mask", 0);
        /*
         * Refer to linux documentation for details:
         * Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt

diff --git a/drivers/pinctrl/nxp/pinctrl-imx.h b/drivers/pinctrl/nxp/pinctrl-imx.h
index 037c491..a26ba85 100644 (file)
--- a/drivers/pinctrl/nxp/pinctrl-imx.h
+++ b/drivers/pinctrl/nxp/pinctrl-imx.h
@@ -11,11 +11,13 @@
  * @base: the address to the controller in virtual memory
  * @input_sel_base: the address of the select input in virtual memory.
  * @flags: flags specific for each soc
+ * @mux_mask: Used when SHARE_MUX_CONF_REG flag is added
  */
 struct imx_pinctrl_soc_info {
        void __iomem *base;
        void __iomem *input_sel_base;
        unsigned int flags;
+       unsigned int mux_mask;
 };
 
 /**
@@ -41,6 +43,7 @@ extern const struct pinctrl_ops imx_pinctrl_ops;
 
 #define SHARE_MUX_CONF_REG     0x1
 #define ZERO_OFFSET_VALID      0x2
+#define CONFIG_IBE_OBE         0x4
 
 #define IOMUXC_CONFIG_SION     (0x1 << 4)
 

diff --git a/drivers/pinctrl/nxp/pinctrl-imx7ulp.c b/drivers/pinctrl/nxp/pinctrl-imx7ulp.c
new file mode 100644 (file)
index 0000000..5f01175
--- /dev/null
+++ b/drivers/pinctrl/nxp/pinctrl-imx7ulp.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * Peng Fan <peng.fan@nxp.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <dm/device.h>
+#include <dm/pinctrl.h>
+
+#include "pinctrl-imx.h"
+
+static struct imx_pinctrl_soc_info imx7ulp_pinctrl_soc_info = {
+       .flags = ZERO_OFFSET_VALID | SHARE_MUX_CONF_REG | CONFIG_IBE_OBE,
+};
+
+static int imx7ulp_pinctrl_probe(struct udevice *dev)
+{
+       struct imx_pinctrl_soc_info *info =
+               (struct imx_pinctrl_soc_info *)dev_get_driver_data(dev);
+
+       return imx_pinctrl_probe(dev, info);
+}
+
+static const struct udevice_id imx7ulp_pinctrl_match[] = {
+       { .compatible = "fsl,imx7ulp-iomuxc-0", .data = (ulong)&imx7ulp_pinctrl_soc_info },
+       { .compatible = "fsl,imx7ulp-iomuxc-1", .data = (ulong)&imx7ulp_pinctrl_soc_info },
+       { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(imx7ulp_pinctrl) = {
+       .name = "imx7ulp-pinctrl",
+       .id = UCLASS_PINCTRL,
+       .of_match = of_match_ptr(imx7ulp_pinctrl_match),
+       .probe = imx7ulp_pinctrl_probe,
+       .remove = imx_pinctrl_remove,
+       .priv_auto_alloc_size = sizeof(struct imx_pinctrl_priv),
+       .ops = &imx_pinctrl_ops,
+       .flags = DM_FLAG_PRE_RELOC,
+};