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[X86] Remove lines that set v8f32 FP_ROUND/FP_EXTEND to Legal under AVX512. NFCI
author
Craig Topper
<craig.topper@intel.com>
Mon, 27 Nov 2017 22:01:17 +0000
(22:01 +0000)
committer
Craig Topper
<craig.topper@intel.com>
Mon, 27 Nov 2017 22:01:17 +0000
(22:01 +0000)
We don't do this for narrow vectors under AVX or SSE features. We also don't set them to Expand like we do for many vectors op. Nor does TargetLoweringBase.cpp. This leads me to believe these default to Legal.
llvm-svn: 319103
llvm/lib/Target/X86/X86ISelLowering.cpp
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diff --git
a/llvm/lib/Target/X86/X86ISelLowering.cpp
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index
36e8388
..
4580466
100644
(file)
--- a/
llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/
llvm/lib/Target/X86/X86ISelLowering.cpp
@@
-1202,8
+1202,6
@@
X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::UINT_TO_FP, MVT::v4i1, Custom);
setOperationAction(ISD::SINT_TO_FP, MVT::v2i1, Custom);
setOperationAction(ISD::UINT_TO_FP, MVT::v2i1, Custom);
- setOperationAction(ISD::FP_ROUND, MVT::v8f32, Legal);
- setOperationAction(ISD::FP_EXTEND, MVT::v8f32, Legal);
setTruncStoreAction(MVT::v8i64, MVT::v8i8, Legal);
setTruncStoreAction(MVT::v8i64, MVT::v8i16, Legal);