}
+LUnallocated* LChunkBuilder::TempDoubleRegister() {
+ LUnallocated* operand =
+ new(zone()) LUnallocated(LUnallocated::MUST_HAVE_DOUBLE_REGISTER);
+ int vreg = allocator_->GetVirtualRegister();
+ if (!allocator_->AllocationOk()) {
+ Abort(kOutOfVirtualRegistersWhileTryingToAllocateTempRegister);
+ vreg = 0;
+ }
+ operand->set_virtual_register(vreg);
+ return operand;
+}
+
+
int LPlatformChunk::GetNextSpillIndex() {
return spill_slot_count_++;
}
} else {
LOperand* value = UseRegister(val);
LOperand* temp1 = TempRegister();
- LOperand* temp2 = instr->CanTruncateToInt32() ? NULL : FixedTemp(d24);
+ LOperand* temp2 = instr->CanTruncateToInt32()
+ ? NULL : TempDoubleRegister();
LInstruction* result =
DefineAsRegister(new(zone()) LTaggedToI(value, temp1, temp2));
if (!val->representation().IsSmi()) result = AssignEnvironment(result);
return AssignEnvironment(
DefineAsRegister(new(zone()) LClampTToUint8(reg,
TempRegister(),
- FixedTemp(d24))));
+ TempDoubleRegister())));
}
}
ASSERT(instr->representation().IsDouble());
ASSERT(instr->value()->representation().IsDouble());
LOperand* input = UseRegister(instr->value());
- // TODO(all): Implement TempFPRegister.
- LOperand* double_temp1 = FixedTemp(d24); // This was chosen arbitrarily.
+ LOperand* double_temp1 = TempDoubleRegister();
LOperand* temp1 = TempRegister();
LOperand* temp2 = TempRegister();
LOperand* temp3 = TempRegister();
ASSERT(instr->value()->representation().IsDouble());
LOperand* input = UseRegister(instr->value());
if (instr->representation().IsInteger32()) {
- LMathRoundI* result = new(zone()) LMathRoundI(input, FixedTemp(d24));
+ LOperand* temp = TempDoubleRegister();
+ LMathRoundI* result = new(zone()) LMathRoundI(input, temp);
return AssignEnvironment(DefineAsRegister(result));
} else {
ASSERT(instr->representation().IsDouble());
// Temporary operand that must be in a register.
MUST_USE_RESULT LUnallocated* TempRegister();
+ // Temporary operand that must be in a double register.
+ MUST_USE_RESULT LUnallocated* TempDoubleRegister();
+
// Temporary operand that must be in a fixed double register.
MUST_USE_RESULT LOperand* FixedTemp(DoubleRegister reg);
register_beneficial_(true) {
if (operand_ != NULL && operand_->IsUnallocated()) {
LUnallocated* unalloc = LUnallocated::cast(operand_);
- requires_reg_ = unalloc->HasRegisterPolicy();
+ requires_reg_ = unalloc->HasRegisterPolicy() ||
+ unalloc->HasDoubleRegisterPolicy();
register_beneficial_ = !unalloc->HasAnyPolicy();
}
ASSERT(pos_.IsValid());
}
Use(block_start_position, curr_position.InstructionEnd(), temp, NULL);
Define(curr_position, temp, NULL);
+
+ if (temp->IsUnallocated()) {
+ LUnallocated* temp_unalloc = LUnallocated::cast(temp);
+ if (temp_unalloc->HasDoubleRegisterPolicy()) {
+ double_artificial_registers_.Add(
+ temp_unalloc->virtual_register() - first_artificial_register_,
+ zone());
+ }
+ }
}
}
}
void LAllocator::MeetRegisterConstraints() {
LAllocatorPhase phase("L_Register constraints", this);
- first_artificial_register_ = next_virtual_register_;
const ZoneList<HBasicBlock*>* blocks = graph_->blocks();
for (int i = 0; i < blocks->length(); ++i) {
HBasicBlock* block = blocks->at(i);
case LUnallocated::MUST_HAVE_REGISTER:
stream->Add("(R)");
break;
+ case LUnallocated::MUST_HAVE_DOUBLE_REGISTER:
+ stream->Add("(D)");
+ break;
case LUnallocated::WRITABLE_REGISTER:
stream->Add("(WR)");
break;
FIXED_REGISTER,
FIXED_DOUBLE_REGISTER,
MUST_HAVE_REGISTER,
+ MUST_HAVE_DOUBLE_REGISTER,
WRITABLE_REGISTER,
SAME_AS_FIRST_INPUT
};
extended_policy() == WRITABLE_REGISTER ||
extended_policy() == MUST_HAVE_REGISTER);
}
+ bool HasDoubleRegisterPolicy() const {
+ return basic_policy() == EXTENDED_POLICY &&
+ extended_policy() == MUST_HAVE_DOUBLE_REGISTER;
+ }
bool HasSameAsInputPolicy() const {
return basic_policy() == EXTENDED_POLICY &&
extended_policy() == SAME_AS_FIRST_INPUT;