static StringInit *get(StringRef);
- const std::string &getValue() const { return Value; }
+ StringRef getValue() const { return Value; }
Init *convertInitializerTo(RecTy *Ty) const override;
static CodeInit *get(StringRef);
- const std::string &getValue() const { return Value; }
+ StringRef getValue() const { return Value; }
Init *convertInitializerTo(RecTy *Ty) const override;
static VarInit *get(StringRef VN, RecTy *T);
static VarInit *get(Init *VN, RecTy *T);
- const std::string &getName() const;
+ StringRef getName() const;
Init *getNameInit() const { return VarName; }
std::string getNameInitAsString() const {
Init *getOperator() const { return Val; }
- const std::string &getName() const { return ValName; }
+ StringRef getName() const { return ValName; }
unsigned getNumArgs() const { return Args.size(); }
Init *getArg(unsigned Num) const {
assert(Num < Args.size() && "Arg number out of range!");
return Args[Num];
}
- const std::string &getArgName(unsigned Num) const {
+ StringRef getArgName(unsigned Num) const {
assert(Num < ArgNames.size() && "Arg number out of range!");
return ArgNames[Num];
}
RecordVal(Init *N, RecTy *T, bool P);
RecordVal(StringRef N, RecTy *T, bool P);
- const std::string &getName() const;
+ StringRef getName() const;
const Init *getNameInit() const { return NameAndPrefix.getPointer(); }
std::string getNameInitAsString() const {
unsigned getID() const { return ID; }
- const std::string &getName() const;
+ StringRef getName() const;
Init *getNameInit() const {
return Name;
}
TableGenStringKey(StringRef str) : data(str) {}
TableGenStringKey(const char *str) : data(str) {}
- const std::string &str() const { return data; }
+ StringRef str() const { return data; }
friend hash_code hash_value(const TableGenStringKey &Value) {
using llvm::hash_value;
return StringInit::get(LHSi->getAsString());
} else {
if (StringInit *LHSs = dyn_cast<StringInit>(LHS)) {
- const std::string &Name = LHSs->getValue();
+ StringRef Name = LHSs->getValue();
// From TGParser::ParseIDValue
if (CurRec) {
return I.get();
}
-const std::string &VarInit::getName() const {
+StringRef VarInit::getName() const {
StringInit *NameString = cast<StringInit>(getNameInit());
return NameString->getValue();
}
assert(Value && "Cannot create unset value for current type!");
}
-const std::string &RecordVal::getName() const {
+StringRef RecordVal::getName() const {
return cast<StringInit>(getNameInit())->getValue();
}
return TheInit.get();
}
-const std::string &Record::getName() const {
+StringRef Record::getName() const {
return cast<StringInit>(Name)->getValue();
}
if (CI->ValueName.empty()) {
CI->ClassName = Rec->getName();
- CI->Name = "MCK_" + Rec->getName();
+ CI->Name = "MCK_" + Rec->getName().str();
CI->ValueName = Rec->getName();
} else
- CI->ValueName = CI->ValueName + "," + Rec->getName();
+ CI->ValueName = CI->ValueName + "," + Rec->getName().str();
}
}
size_t MaxRowLength = 2; // minimum is custom converter plus terminator.
// TargetOperandClass - This is the target's operand class, like X86Operand.
- std::string TargetOperandClass = Target.getName() + "Operand";
+ std::string TargetOperandClass = Target.getName().str() + "Operand";
// Write the convert function to a separate stream, so we can drop it after
// the enum. We'll build up the conversion handlers for the individual
Reg = "0";
} else {
Reg = getQualifiedName(OpInfo.Register);
- Name = "reg" + OpInfo.Register->getName();
+ Name = "reg" + OpInfo.Register->getName().str();
}
Signature += "__" + Name;
Name = "CVT_" + Name;
O << " default: llvm_unreachable(\"Unexpected opcode.\");\n";
std::vector<std::pair<std::string, AsmWriterOperand>> OpsToPrint;
OpsToPrint.push_back(std::make_pair(FirstInst.CGI->Namespace + "::" +
- FirstInst.CGI->TheDef->getName(),
+ FirstInst.CGI->TheDef->getName().str(),
FirstInst.Operands[i]));
for (const AsmWriterInst &AWI : SimilarInsts) {
- OpsToPrint.push_back(std::make_pair(AWI.CGI->Namespace+"::"+
- AWI.CGI->TheDef->getName(),
+ OpsToPrint.push_back(std::make_pair(AWI.CGI->Namespace+"::" +
+ AWI.CGI->TheDef->getName().str(),
AWI.Operands[i]));
}
std::reverse(OpsToPrint.begin(), OpsToPrint.end());
Record *R = CGA.ResultOperands[i].getRecord();
if (R->isSubClassOf("RegisterOperand"))
R = R->getValueAsDef("RegClass");
- Cond = std::string("MRI.getRegClass(") + Target.getName() + "::" +
- R->getName() + "RegClassID)"
- ".contains(" + Op + ".getReg())";
+ Cond = std::string("MRI.getRegClass(") + Target.getName().str() +
+ "::" + R->getName().str() + "RegClassID).contains(" + Op +
+ ".getReg())";
} else {
Cond = Op + ".getReg() == MI->getOperand(" +
utostr(IAP.getOpIndex(ROName)) + ").getReg()";
} else
break; // No conditions on this operand at all
}
- Cond = Target.getName() + ClassName + "ValidateMCOperand(" +
+ Cond = Target.getName().str() + ClassName + "ValidateMCOperand(" +
Op + ", STI, " + utostr(Entry) + ")";
}
// for all subcases of ResultOperand::K_Record:
break;
}
- Cond = Op + ".getReg() == " + Target.getName() + "::" +
- CGA.ResultOperands[i].getRegister()->getName();
+ Cond = Op + ".getReg() == " + Target.getName().str() + "::" +
+ CGA.ResultOperands[i].getRegister()->getName().str();
IAP.addCond(Cond);
break;
}
R->getValueAsBit("isPseudo"))
continue;
const std::string &InstName = R->getValueAsString("Namespace") + "::"
- + R->getName();
+ + R->getName().str();
std::string Case = getInstructionCase(R, Target);
CaseMap[Case].push_back(InstName);
/// Return the name to use in the generated code to reference this, this is
/// "Predicate_foo" if from a pattern fragment "foo".
std::string TreePredicateFn::getFnName() const {
- return "Predicate_" + PatFragRec->getRecord()->getName();
+ return "Predicate_" + PatFragRec->getRecord()->getName().str();
}
/// getCodeToRunOnSDNode - Return the code for the function body that
// Take care to instantiate each of the suboperands with the correct
// nomenclature: $foo.bar
- ResultOperands.emplace_back(Result->getArgName(AliasOpNo) + "." +
- MIOI->getArgName(SubOp),
+ ResultOperands.emplace_back(Result->getArgName(AliasOpNo).str()
+ + "." + MIOI->getArgName(SubOp).str(),
SubRec);
ResultInstOperandIndex.push_back(std::make_pair(i, SubOp));
}
}
}
-const std::string &CodeGenRegister::getName() const {
+const StringRef CodeGenRegister::getName() const {
assert(TheDef && "no def");
return TheDef->getName();
}
CodeGenRegister(Record *R, unsigned Enum);
- const std::string &getName() const;
+ const StringRef getName() const;
// Extract more information from TheDef. This is used to build an object
// graph after all CodeGenRegister objects have been created.
if (R->getValue("Namespace"))
Namespace = R->getValueAsString("Namespace");
if (Namespace.empty()) return R->getName();
- return Namespace + "::" + R->getName();
+ return Namespace + "::" + R->getName().str();
}
CodeGenTarget::~CodeGenTarget() {
}
-const std::string &CodeGenTarget::getName() const {
+const StringRef CodeGenTarget::getName() const {
return TargetRec->getName();
}
~CodeGenTarget();
Record *getTargetRecord() const { return TargetRec; }
- const std::string &getName() const;
+ const StringRef getName() const;
/// getInstNamespace - Return the target-specific instruction namespace.
///
void DAGISelEmitter::run(raw_ostream &OS) {
emitSourceFileHeader("DAG Instruction Selector for the " +
- CGP.getTargetInfo().getName() + " target", OS);
+ CGP.getTargetInfo().getName().str() + " target", OS);
OS << "// *** NOTE: This file is #included into the middle of the target\n"
<< "// *** instruction selector class. These functions are really "
// If we have a physreg reference like (mul gpr:$src, EAX) then we need to
// record the register
if (LeafRec->isSubClassOf("Register")) {
- AddMatcher(new RecordMatcher("physreg input "+LeafRec->getName(),
+ AddMatcher(new RecordMatcher("physreg input "+LeafRec->getName().str(),
NextRecordedOperandNo));
PhysRegInputs.push_back(std::make_pair(LeafRec, NextRecordedOperandNo++));
return;
unsigned OpNo = 0;
if (N->NodeHasProperty(SDNPHasChain, CGP)) {
// Record the node and remember it in our chained nodes list.
- AddMatcher(new RecordMatcher("'" + N->getOperator()->getName() +
+ AddMatcher(new RecordMatcher("'" + N->getOperator()->getName().str() +
"' chained node",
NextRecordedOperandNo));
// Remember all of the input chains our pattern will match.
// TODO: This redundantly records nodes with both glues and chains.
// Record the node and remember it in our chained nodes list.
- AddMatcher(new RecordMatcher("'" + N->getOperator()->getName() +
+ AddMatcher(new RecordMatcher("'" + N->getOperator()->getName().str() +
"' glue output node",
NextRecordedOperandNo));
}
assert((!ResultVTs.empty() || TreeHasOutGlue || NodeHasChain) &&
"Node has no result");
- AddMatcher(new EmitNodeMatcher(II.Namespace+"::"+II.TheDef->getName(),
+ AddMatcher(new EmitNodeMatcher(II.Namespace+"::"+II.TheDef->getName().str(),
ResultVTs, InstOps,
NodeHasChain, TreeHasInGlue, TreeHasOutGlue,
NodeHasMemRefs, NumFixedArityOperands,
void EmitDisassembler(RecordKeeper &Records, raw_ostream &OS) {
CodeGenTarget Target(Records);
- emitSourceFileHeader(" * " + Target.getName() + " Disassembler", OS);
+ emitSourceFileHeader(" * " + Target.getName().str() + " Disassembler", OS);
// X86 uses a custom disassembler.
if (Target.getName() == "X86") {
CodeGenDAGPatterns CGP(RK);
const CodeGenTarget &Target = CGP.getTargetInfo();
emitSourceFileHeader("\"Fast\" Instruction Selector for the " +
- Target.getName() + " target", OS);
+ Target.getName().str() + " target", OS);
// Determine the target's namespace name.
std::string InstNS = Target.getInstNamespace() + "::";
}
// Returns the record name.
- const std::string &nameWithID(unsigned Opcode) const {
+ const StringRef nameWithID(unsigned Opcode) const {
return AllInstructions[Opcode]->TheDef->getName();
}
TypeRecord = TypeRecord->getValueAsDef("RegClass");
if (TypeRecord->isSubClassOf("RegisterClass")) {
- Decoder = "Decode" + TypeRecord->getName() + "RegisterClass";
+ Decoder = "Decode" + TypeRecord->getName().str() + "RegisterClass";
} else if (TypeRecord->isSubClassOf("PointerLikeRegClass")) {
Decoder = "DecodePointerLikeRegClass" +
utostr(TypeRecord->getValueAsInt("RegClassKind"));
if (TypeRecord->isSubClassOf("RegisterOperand"))
TypeRecord = TypeRecord->getValueAsDef("RegClass");
if (TypeRecord->isSubClassOf("RegisterClass")) {
- Decoder = "Decode" + TypeRecord->getName() + "RegisterClass";
+ Decoder = "Decode" + TypeRecord->getName().str() + "RegisterClass";
isReg = true;
} else if (TypeRecord->isSubClassOf("PointerLikeRegClass")) {
Decoder = "DecodePointerLikeRegClass" +
}
OpList[I->second] = Info.MIOperandNo;
}
- OperandMap[OpList].push_back(Namespace + "::" + Inst->TheDef->getName());
+ OperandMap[OpList].push_back(Namespace + "::" +
+ Inst->TheDef->getName().str());
}
}
OS << "};\n"; // End of register descriptors...
- std::string ClassName = Target.getName() + "GenRegisterInfo";
+ std::string ClassName = Target.getName().str() + "GenRegisterInfo";
auto SubRegIndicesSize =
std::distance(SubRegIndices.begin(), SubRegIndices.end());
// For each unit
for (unsigned j = 0, M = UnitList.size(); j < M;) {
// Add name and bitwise or
- ItinString += Name + "FU::" + UnitList[j]->getName();
+ ItinString += Name + "FU::" + UnitList[j]->getName().str();
if (++j < M) ItinString += " | ";
}
unsigned N = BypassList.size();
unsigned i = 0;
for (; i < N;) {
- ItinString += Name + "Bypass::" + BypassList[i]->getName();
+ ItinString += Name + "Bypass::" + BypassList[i]->getName().str();
if (++i < NOperandCycles) ItinString += ", ";
}
for (; i < NOperandCycles;) {
SubtargetFeatureInfo(Record *D, uint64_t Idx) : TheDef(D), Index(Idx) {}
/// \brief The name of the enumerated constant identifying this feature.
- std::string getEnumName() const { return "Feature_" + TheDef->getName(); }
+ std::string getEnumName() const {
+ return "Feature_" + TheDef->getName().str();
+ }
void dump() const;
static std::vector<std::pair<Record *, SubtargetFeatureInfo>>