unsigned Opc = MI->getOpcode();
if (!MI->getOperand(0).isReg() ||
- !MRI.hasOneUse(MI->getOperand(0).getReg()))
+ !MRI.hasOneNonDBGUse(MI->getOperand(0).getReg()))
break;
// (tbz (any_ext x), b) -> (tbz x, b) if we don't use the extended bits.
Opc == TargetOpcode::G_TRUNC) {
Register NextReg = MI->getOperand(1).getReg();
// Did we find something worth folding?
- if (!NextReg.isValid() || !MRI.hasOneUse(NextReg))
+ if (!NextReg.isValid() || !MRI.hasOneNonDBGUse(NextReg))
break;
// NextReg is worth folding. Keep looking.
while (CondDef) {
// We can only fold if all of the defs have one use.
Register CondDefReg = CondDef->getOperand(0).getReg();
- if (!MRI.hasOneUse(CondDefReg)) {
+ if (!MRI.hasOneNonDBGUse(CondDefReg)) {
// Unless it's another select.
- for (auto UI = MRI.use_instr_begin(CondDefReg), UE = MRI.use_instr_end();
- UI != UE; ++UI) {
- if (CondDef == &*UI)
+ for (const MachineInstr &UI : MRI.use_nodbg_instructions(CondDefReg)) {
+ if (CondDef == &UI)
continue;
- if (UI->getOpcode() != TargetOpcode::G_SELECT)
+ if (UI.getOpcode() != TargetOpcode::G_SELECT)
return false;
}
}
MachineInstr &MI, const MachineRegisterInfo &MRI) const {
// Always fold if there is one use, or if we're optimizing for size.
Register DefReg = MI.getOperand(0).getReg();
- if (MRI.hasOneUse(DefReg) ||
+ if (MRI.hasOneNonDBGUse(DefReg) ||
MI.getParent()->getParent()->getFunction().hasMinSize())
return true;
// We have a fastpath, so folding a shift in and potentially computing it
// many times may be beneficial. Check if this is only used in memory ops.
// If it is, then we should fold.
- return all_of(MRI.use_instructions(DefReg),
+ return all_of(MRI.use_nodbg_instructions(DefReg),
[](MachineInstr &Use) { return Use.mayLoadOrStore(); });
}
// If this is used more than once, let's not bother folding.
// TODO: Check if they are memory ops. If they are, then we can still fold
// without having to recompute anything.
- if (!MRI.hasOneUse(Gep->getOperand(0).getReg()))
+ if (!MRI.hasOneNonDBGUse(Gep->getOperand(0).getReg()))
return None;
// Base is the GEP's LHS, offset is its RHS.
// In that case, we want the default mapping to be on FPR
// instead of blind map every scalar to GPR.
for (const MachineInstr &UseMI :
- MRI.use_instructions(MI.getOperand(0).getReg())) {
+ MRI.use_nodbg_instructions(MI.getOperand(0).getReg())) {
// If we have at least one direct use in a FP instruction,
// assume this was a floating point load in the IR.
// If it was not, we would have had a bitcast before
//
// %z = G_SELECT %cond %x %y
// fpr = G_FOO %z ...
- if (any_of(
- MRI.use_instructions(MI.getOperand(0).getReg()),
- [&](MachineInstr &MI) { return onlyUsesFP(MI, MRI, TRI); }))
+ if (any_of(MRI.use_nodbg_instructions(MI.getOperand(0).getReg()),
+ [&](MachineInstr &MI) { return onlyUsesFP(MI, MRI, TRI); }))
++NumFP;
// Check if the defs of the source values always produce floating point
// UNMERGE into scalars from a vector should always use FPR.
// Likewise if any of the uses are FP instructions.
if (SrcTy.isVector() || SrcTy == LLT::scalar(128) ||
- any_of(MRI.use_instructions(MI.getOperand(0).getReg()),
+ any_of(MRI.use_nodbg_instructions(MI.getOperand(0).getReg()),
[&](MachineInstr &MI) { return onlyUsesFP(MI, MRI, TRI); })) {
// Set the register bank of every operand to FPR.
for (unsigned Idx = 0, NumOperands = MI.getNumOperands();
-; RUN: llc -enable-machine-outliner=never -verify-machineinstrs %s -o - -mtriple=aarch64-linux-gnu -aarch64-enable-atomic-cfg-tidy=0 | FileCheck %s
-; RUN: llc -global-isel -enable-machine-outliner=never -verify-machineinstrs %s -o - -mtriple=aarch64-linux-gnu -aarch64-enable-atomic-cfg-tidy=0 | FileCheck %s --check-prefix=GISEL
+; RUN: llc -debugify-and-strip-all-safe -enable-machine-outliner=never -verify-machineinstrs %s -o - -mtriple=aarch64-linux-gnu -aarch64-enable-atomic-cfg-tidy=0 | FileCheck %s
+; RUN: llc -debugify-and-strip-all-safe -global-isel -enable-machine-outliner=never -verify-machineinstrs %s -o - -mtriple=aarch64-linux-gnu -aarch64-enable-atomic-cfg-tidy=0 | FileCheck %s --check-prefix=GISEL
; FIXME: GISel only knows how to handle explicit G_SEXT instructions. So when
; G_SEXT is lowered to anything else, it won't fold in a stx*.