+2013-12-17 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
+
+ * gas/i386/disassem.s: New.
+ * gas/i386/disassem.d: Likewise.
+ * gas/i386/x86-64-disassem.s: Likewise.
+ * gas/i386/x86-64-disassem.d: Likewise.
+ * gas/i386/i386.exp: Run disassem and x86-64-disassem.
+
2013-12-16 Andrew Bennett <andrew.bennett@imgtec.com>
* gas/mips/mips.exp: Add CP1 register name tests.
--- /dev/null
+#objdump: -drw
+#name: opcodes with invalid modrm byte
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <\.text>:
+[ ]*[a-f0-9]+:[ ]*ff[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*ef[ ]*out %eax,\(%dx\)
+[ ]*[a-f0-9]+:[ ]*ff[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*d8[ ]*\.byte 0xd8
+#pass
--- /dev/null
+.text
+.byte 0xFF, 0xEF
+.byte 0xFF, 0xD8
run_list_test "mpx-inval-1" "-al"
run_dump_test "mpx-add-bnd-prefix"
run_dump_test "sha"
+ run_dump_test "disassem"
# These tests require support for 8 and 16 bit relocs,
# so we only run them for ELF and COFF targets.
run_dump_test "x86-64-mpx-addr32"
run_dump_test "x86-64-mpx-add-bnd-prefix"
run_dump_test "x86-64-sha"
+ run_dump_test "x86-64-disassem"
if { ![istarget "*-*-aix*"]
&& ![istarget "*-*-beos*"]
--- /dev/null
+#objdump: -drw
+#name: x86-64 opcodes with invalid modrm byte
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <\.text>:
+[ ]*[a-f0-9]+:[ ]*ff[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*ef[ ]*out %eax,\(%dx\)
+[ ]*[a-f0-9]+:[ ]*ff[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*d8[ ]*\.byte 0xd8
+#pass
--- /dev/null
+.text
+.byte 0xFF, 0xEF
+.byte 0xFF, 0xD8
+2013-12-17 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
+
+ * i386-dis.c (MOD_FF_REG_3): New.
+ (MOD_FF_REG_5): Likewise.
+ (mod_table): Add MOD_FF_REG_3 and MOD_FF_REG_5.
+ (reg_table): Use MOD_FF_REG_3 and MOD_FF_REG_5.
+
2013-12-16 Andrew Bennett <andrew.bennett@imgtec.com>
* mips-dis.c: Add mips_cp1_names pointer.
MOD_8D = 0,
MOD_C6_REG_7,
MOD_C7_REG_7,
+ MOD_FF_REG_3,
+ MOD_FF_REG_5,
MOD_0F01_REG_0,
MOD_0F01_REG_1,
MOD_0F01_REG_2,
{ "incQ", { Evh1 } },
{ "decQ", { Evh1 } },
{ "call{T|}", { indirEv, BND } },
- { "Jcall{T|}", { indirEp } },
+ { MOD_TABLE (MOD_FF_REG_3) },
{ "jmp{T|}", { indirEv, BND } },
- { "Jjmp{T|}", { indirEp } },
+ { MOD_TABLE (MOD_FF_REG_5) },
{ "pushU", { stackEv } },
{ Bad_Opcode },
},
{ RM_TABLE (RM_C7_REG_7) },
},
{
+ /* MOD_FF_REG_3 */
+ { "Jcall{T|}", { indirEp } },
+ },
+ {
+ /* MOD_FF_REG_5 */
+ { "Jjmp{T|}", { indirEp } },
+ },
+ {
/* MOD_0F01_REG_0 */
{ X86_64_TABLE (X86_64_0F01_REG_0) },
{ RM_TABLE (RM_0F01_REG_0) },