net:stmmac:dwc-qos: add support for external rmii_rtx clocks
authorSamin Guo <samin.guo@linux.starfivetech.com>
Fri, 21 Oct 2022 09:28:39 +0000 (17:28 +0800)
committerJianlong Huang <jianlong.huang@starfivetech.com>
Thu, 3 Nov 2022 09:24:53 +0000 (17:24 +0800)
JH7110A use external rmii_rtx clk for tx clk on 100M/10M mode.

Signed-off-by: Samin Guo <samin.guo@linux.starfivetech.com>
arch/riscv/boot/dts/starfive/jh7110.dtsi
drivers/net/ethernet/stmicro/stmmac/dwmac-starfive-plat.c

index dbcf742..756006d 100644 (file)
                                "ptp_ref",
                                "stmmaceth",
                                "pclk",
-                               "gtxc";
+                               "gtxc",
+                               "rmii_rtx";
                        clocks = <&clkgen JH7110_GMAC0_GTXCLK>,
                                 <&clkgen JH7110_U0_GMAC5_CLK_TX>,
                                 <&clkgen JH7110_GMAC0_PTP>,
                                 <&clkgen JH7110_U0_GMAC5_CLK_AHB>,
                                 <&clkgen JH7110_U0_GMAC5_CLK_AXI>,
-                                <&clkgen JH7110_GMAC0_GTXC>;
+                                <&clkgen JH7110_GMAC0_GTXC>,
+                                <&clkgen JH7110_GMAC0_RMII_RTX>;
                        resets = <&rstgen RSTN_U0_DW_GMAC5_AXI64_AHB>,
                                 <&rstgen RSTN_U0_DW_GMAC5_AXI64_AXI>;
                        reset-names = "ahb", "stmmaceth";
                                "ptp_ref",
                                "stmmaceth",
                                "pclk",
-                               "gtxc";
+                               "gtxc",
+                               "rmii_rtx";
                        clocks = <&clkgen JH7110_GMAC1_GTXCLK>,
                                 <&clkgen JH7110_GMAC5_CLK_TX>,
                                 <&clkgen JH7110_GMAC5_CLK_PTP>,
                                 <&clkgen JH7110_GMAC5_CLK_AHB>,
                                 <&clkgen JH7110_GMAC5_CLK_AXI>,
-                                <&clkgen JH7110_GMAC1_GTXC>;
+                                <&clkgen JH7110_GMAC1_GTXC>,
+                                <&clkgen JH7110_GMAC1_RMII_RTX>;
                        resets = <&rstgen RSTN_U1_DW_GMAC5_AXI64_H_N>,
                                 <&rstgen RSTN_U1_DW_GMAC5_AXI64_A_I>;
                        reset-names = "ahb", "stmmaceth";
index c563582..bde2a61 100644 (file)
@@ -13,6 +13,7 @@ struct starfive_dwmac {
        struct clk *clk_tx;
        struct clk *clk_gtx;
        struct clk *clk_gtxc;
+       struct clk *clk_rmii_rtx;
 };
 
 static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
@@ -39,6 +40,10 @@ static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
        err = clk_set_rate(dwmac->clk_gtx, rate);
        if (err < 0)
                dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
+
+       err = clk_set_rate(dwmac->clk_rmii_rtx, rate);
+       if (err < 0)
+               dev_err(dwmac->dev, "failed to set rtx rate %lu\n", rate);
 }
 
 static const struct of_device_id starfive_eth_plat_match[] = {
@@ -100,6 +105,12 @@ static int starfive_eth_plat_probe(struct platform_device *pdev)
                goto disable_gtx;
        }
 
+       dwmac->clk_rmii_rtx = devm_clk_get(&pdev->dev, "rmii_rtx");
+       if (IS_ERR(dwmac->clk_rmii_rtx)) {
+               err = PTR_ERR(dwmac->clk_rmii_rtx);
+               goto disable_gtx;
+       }
+
        err = clk_prepare_enable(dwmac->clk_gtxc);
        if (err < 0)
                goto disable_gtx;