drm/panel: s6e63m0: Simplify SPI writing
authorLinus Walleij <linus.walleij@linaro.org>
Tue, 10 Nov 2020 23:46:49 +0000 (00:46 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Sun, 15 Nov 2020 23:46:50 +0000 (00:46 +0100)
This writing code is equivalent to the spi_write()
helper in the SPI framework. Insert a comment
that this will always work fine since SPI buffers
are in native endianness.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Stephan Gerhold <stephan@gerhold.net>
Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201110234653.2248594-2-linus.walleij@linaro.org
drivers/gpu/drm/panel/panel-samsung-s6e63m0-spi.c

index d298d780220db08c9933a9012bd851c5fa2b17a4..75f00ed4810bfba47ba06cc2073d3055d10080bf 100644 (file)
@@ -25,16 +25,9 @@ static int s6e63m0_spi_dcs_read(struct device *dev, const u8 cmd, u8 *data)
 static int s6e63m0_spi_write_word(struct device *dev, u16 data)
 {
        struct spi_device *spi = to_spi_device(dev);
-       struct spi_transfer xfer = {
-               .len    = 2,
-               .tx_buf = &data,
-       };
-       struct spi_message msg;
 
-       spi_message_init(&msg);
-       spi_message_add_tail(&xfer, &msg);
-
-       return spi_sync(spi, &msg);
+       /* SPI buffers are always in CPU order */
+       return spi_write(spi, &data, 2);
 }
 
 static int s6e63m0_spi_dcs_write(struct device *dev, const u8 *data, size_t len)