};
-/* 3VDD, 3VSB, VBAT * 0.006 */
-#define REST_VLT_BEGIN 12 /* the 13th volt to 15th */
-#define REST_VLT_END 14 /* the 13th volt to 15th */
-
#define W83795_REG_FAN(index) (0x2E + (index))
#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
static inline u16 in_from_reg(u8 index, u16 val)
{
- if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
+ /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
+ if (index >= 12 && index <= 14)
return val * 6;
else
return val * 2;
static inline u16 in_to_reg(u8 index, u16 val)
{
- if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
+ if (index >= 12 && index <= 14)
return val / 6;
else
return val / 2;