drm/amd/display: Change input parameter for set_drr

[Why]
Change set_drr to pass in the entire dc_crtc_timing_adjust
structure instead of passing in the parameters individually.
This is to more easily pass in required parameters in the
adjust structure when it gets updated.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 8e6c815..d55c1dd 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -304,7 +304,10 @@ bool dc_stream_adjust_vmin_vmax(struct dc *dc,
        int i = 0;
        bool ret = false;
 
-       stream->adjust = *adjust;
+       stream->adjust.v_total_max = adjust->v_total_max;
+       stream->adjust.v_total_mid = adjust->v_total_mid;
+       stream->adjust.v_total_mid_frame_num = adjust->v_total_mid_frame_num;
+       stream->adjust.v_total_min = adjust->v_total_min;
 
        for (i = 0; i < MAX_PIPES; i++) {
                struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];
@@ -312,10 +315,7 @@ bool dc_stream_adjust_vmin_vmax(struct dc *dc,
                if (pipe->stream == stream && pipe->stream_res.tg) {
                        dc->hwss.set_drr(&pipe,
                                        1,
-                                       adjust->v_total_min,
-                                       adjust->v_total_max,
-                                       adjust->v_total_mid,
-                                       adjust->v_total_mid_frame_num);
+                                       *adjust);
 
                        ret = true;
                }

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 804092f..873c6f2 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1846,8 +1846,7 @@ void dce110_set_safe_displaymarks(
  ******************************************************************************/
 
 static void set_drr(struct pipe_ctx **pipe_ctx,
-               int num_pipes, unsigned int vmin, unsigned int vmax,
-               unsigned int vmid, unsigned int vmid_frame_number)
+               int num_pipes, struct dc_crtc_timing_adjust adjust)
 {
        int i = 0;
        struct drr_params params = {0};
@@ -1856,8 +1855,8 @@ static void set_drr(struct pipe_ctx **pipe_ctx,
        // Note DRR trigger events are generated regardless of whether num frames met.
        unsigned int num_frames = 2;
 
-       params.vertical_total_max = vmax;
-       params.vertical_total_min = vmin;
+       params.vertical_total_max = adjust.v_total_max;
+       params.vertical_total_min = adjust.v_total_min;
 
        /* TODO: If multiple pipes are to be supported, you need
         * some GSL stuff. Static screen triggers may be programmed differently
@@ -1867,7 +1866,7 @@ static void set_drr(struct pipe_ctx **pipe_ctx,
                pipe_ctx[i]->stream_res.tg->funcs->set_drr(
                        pipe_ctx[i]->stream_res.tg, &params);
 
-               if (vmax != 0 && vmin != 0)
+               if (adjust.v_total_max != 0 && adjust.v_total_min != 0)
                        pipe_ctx[i]->stream_res.tg->funcs->set_static_screen_control(
                                        pipe_ctx[i]->stream_res.tg,
                                        event_triggers, num_frames);

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 9eb33ea..e0aa88a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -3271,8 +3271,7 @@ void dcn10_optimize_bandwidth(
 }
 
 void dcn10_set_drr(struct pipe_ctx **pipe_ctx,
-               int num_pipes, unsigned int vmin, unsigned int vmax,
-               unsigned int vmid, unsigned int vmid_frame_number)
+               int num_pipes, struct dc_crtc_timing_adjust adjust)
 {
        int i = 0;
        struct drr_params params = {0};
@@ -3281,11 +3280,10 @@ void dcn10_set_drr(struct pipe_ctx **pipe_ctx,
        // Note DRR trigger events are generated regardless of whether num frames met.
        unsigned int num_frames = 2;
 
-       params.vertical_total_max = vmax;
-       params.vertical_total_min = vmin;
-       params.vertical_total_mid = vmid;
-       params.vertical_total_mid_frame_num = vmid_frame_number;
-
+       params.vertical_total_max = adjust.v_total_max;
+       params.vertical_total_min = adjust.v_total_min;
+       params.vertical_total_mid = adjust.v_total_mid;
+       params.vertical_total_mid_frame_num = adjust.v_total_mid_frame_num;
        /* TODO: If multiple pipes are to be supported, you need
         * some GSL stuff. Static screen triggers may be programmed differently
         * as well.
@@ -3293,7 +3291,7 @@ void dcn10_set_drr(struct pipe_ctx **pipe_ctx,
        for (i = 0; i < num_pipes; i++) {
                pipe_ctx[i]->stream_res.tg->funcs->set_drr(
                        pipe_ctx[i]->stream_res.tg, &params);
-               if (vmax != 0 && vmin != 0)
+               if (adjust.v_total_max != 0 && adjust.v_total_min != 0)
                        pipe_ctx[i]->stream_res.tg->funcs->set_static_screen_control(
                                        pipe_ctx[i]->stream_res.tg,
                                        event_triggers, num_frames);

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
index e0800cd..ff1ce20 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
@@ -145,8 +145,7 @@ bool dcn10_dummy_display_power_gating(
                struct dc_bios *dcb,
                enum pipe_gating_control power_gating);
 void dcn10_set_drr(struct pipe_ctx **pipe_ctx,
-               int num_pipes, unsigned int vmin, unsigned int vmax,
-               unsigned int vmid, unsigned int vmid_frame_number);
+               int num_pipes, struct dc_crtc_timing_adjust adjust);
 void dcn10_get_position(struct pipe_ctx **pipe_ctx,
                int num_pipes,
                struct crtc_position *position);

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
index 2fedfca..1a6366a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
@@ -118,8 +118,7 @@ struct hw_sequencer_funcs {
                        struct pipe_ctx *pipe_ctx,
                        enum vline_select vline);
        void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,
-                       unsigned int vmin, unsigned int vmax,
-                       unsigned int vmid, unsigned int vmid_frame_number);
+                       struct dc_crtc_timing_adjust adjust);
        void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx,
                        int num_pipes,
                        const struct dc_static_screen_params *events);

diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
index e5f9d77..4287be7 100644 (file)
--- a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
+++ b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
@@ -118,7 +118,7 @@ static unsigned int calc_duration_in_us_from_v_total(
        return duration_in_us;
 }
 
-static unsigned int calc_v_total_from_refresh(
+unsigned int mod_freesync_calc_v_total_from_refresh(
                const struct dc_stream_state *stream,
                unsigned int refresh_in_uhz)
 {
@@ -280,10 +280,10 @@ static void apply_below_the_range(struct core_freesync *core_freesync,
 
                /* Restore FreeSync */
                in_out_vrr->adjust.v_total_min =
-                       calc_v_total_from_refresh(stream,
+                       mod_freesync_calc_v_total_from_refresh(stream,
                                in_out_vrr->max_refresh_in_uhz);
                in_out_vrr->adjust.v_total_max =
-                       calc_v_total_from_refresh(stream,
+                       mod_freesync_calc_v_total_from_refresh(stream,
                                in_out_vrr->min_refresh_in_uhz);
        /* BTR set to "active" so engage */
        } else {
@@ -442,16 +442,16 @@ static void apply_fixed_refresh(struct core_freesync *core_freesync,
        if (update) {
                if (in_out_vrr->fixed.fixed_active) {
                        in_out_vrr->adjust.v_total_min =
-                               calc_v_total_from_refresh(
+                               mod_freesync_calc_v_total_from_refresh(
                                stream, in_out_vrr->max_refresh_in_uhz);
                        in_out_vrr->adjust.v_total_max =
                                        in_out_vrr->adjust.v_total_min;
                } else {
                        in_out_vrr->adjust.v_total_min =
-                               calc_v_total_from_refresh(stream,
+                               mod_freesync_calc_v_total_from_refresh(stream,
                                        in_out_vrr->max_refresh_in_uhz);
                        in_out_vrr->adjust.v_total_max =
-                               calc_v_total_from_refresh(stream,
+                               mod_freesync_calc_v_total_from_refresh(stream,
                                        in_out_vrr->min_refresh_in_uhz);
                }
        }
@@ -1082,10 +1082,10 @@ void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync,
                        refresh_range >= MIN_REFRESH_RANGE) {
 
                in_out_vrr->adjust.v_total_min =
-                       calc_v_total_from_refresh(stream,
+                       mod_freesync_calc_v_total_from_refresh(stream,
                                in_out_vrr->max_refresh_in_uhz);
                in_out_vrr->adjust.v_total_max =
-                       calc_v_total_from_refresh(stream,
+                       mod_freesync_calc_v_total_from_refresh(stream,
                                in_out_vrr->min_refresh_in_uhz);
        } else if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED) {
                in_out_vrr->fixed.target_refresh_in_uhz =
@@ -1099,7 +1099,7 @@ void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync,
                } else {
                        in_out_vrr->fixed.fixed_active = true;
                        in_out_vrr->adjust.v_total_min =
-                               calc_v_total_from_refresh(stream,
+                               mod_freesync_calc_v_total_from_refresh(stream,
                                        in_out_vrr->fixed.target_refresh_in_uhz);
                        in_out_vrr->adjust.v_total_max =
                                in_out_vrr->adjust.v_total_min;
@@ -1206,10 +1206,10 @@ void mod_freesync_handle_v_update(struct mod_freesync *mod_freesync,
                /* Restore FreeSync */
                if (in_out_vrr->btr.frame_counter == 0) {
                        in_out_vrr->adjust.v_total_min =
-                               calc_v_total_from_refresh(stream,
+                               mod_freesync_calc_v_total_from_refresh(stream,
                                in_out_vrr->max_refresh_in_uhz);
                        in_out_vrr->adjust.v_total_max =
-                               calc_v_total_from_refresh(stream,
+                               mod_freesync_calc_v_total_from_refresh(stream,
                                in_out_vrr->min_refresh_in_uhz);
                }
        }
@@ -1267,6 +1267,21 @@ unsigned long long mod_freesync_calc_nominal_field_rate(
        return nominal_field_rate_in_uhz;
 }
 
+unsigned long long mod_freesync_calc_field_rate_from_timing(
+               unsigned int vtotal, unsigned int htotal, unsigned int pix_clk)
+{
+       unsigned long long field_rate_in_uhz = 0;
+       unsigned int total = htotal * vtotal;
+
+       /* Calculate nominal field rate for stream, rounded up to nearest integer */
+       field_rate_in_uhz = pix_clk;
+       field_rate_in_uhz *= 1000000ULL;
+
+       field_rate_in_uhz =     div_u64(field_rate_in_uhz, total);
+
+       return field_rate_in_uhz;
+}
+
 bool mod_freesync_is_valid_range(uint32_t min_refresh_cap_in_uhz,
                uint32_t max_refresh_cap_in_uhz,
                uint32_t nominal_field_rate_in_uhz) 

diff --git a/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h b/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h
index b64cd5b..75a158a 100644 (file)
--- a/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h
+++ b/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h
@@ -171,10 +171,15 @@ void mod_freesync_handle_v_update(struct mod_freesync *mod_freesync,
 unsigned long long mod_freesync_calc_nominal_field_rate(
                        const struct dc_stream_state *stream);
 
+unsigned long long mod_freesync_calc_field_rate_from_timing(
+               unsigned int vtotal, unsigned int htotal, unsigned int pix_clk);
+
 bool mod_freesync_is_valid_range(uint32_t min_refresh_cap_in_uhz,
                uint32_t max_refresh_cap_in_uhz,
                uint32_t nominal_field_rate_in_uhz);
 
-
+unsigned int mod_freesync_calc_v_total_from_refresh(
+               const struct dc_stream_state *stream,
+               unsigned int refresh_in_uhz);
 
 #endif