--- /dev/null
+# cr16 testcase for addb $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global add
+add:
+
+ movb $0x1234,r4
+ movb $0x1234,r5
+ addb r4, r5
+ test_h_gr r5, 0x68
+
+ pass
--- /dev/null
+# cr16 testcase for addd $sr,$dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global addd
+addd:
+
+ movd $0x12345678,(r4,r3)
+ addd $0x44444444,(r4,r3)
+
+ test_h_grp "(r4,r3)", 0x56789abc
+
+ pass
--- /dev/null
+# cr16 testcase for addi #$simm8, $dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global addi
+addi:
+
+ movb $1, r4
+ addb $2, r4
+
+ cmpb $3,r4
+ bne not_ok
+
+ movw $0x1234, r5
+ addw $0x1234, r5
+ test_h_gr r5, 0x2468
+
+ pass
+
+ movd $0x12345678, (r5,r4)
+ addd $0x12345678, (r5,r4)
+ test_h_grp "(r5,r4)", 0x2468acf0
+
+ pass
+
+not_ok:
+ fail
--- /dev/null
+# cr16 testcase for addw $sr,$dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global addw
+addw:
+
+ movw $0x1234,r4
+ addw $0x1234,r4
+
+ test_h_gr r4, 0x2468
+
+ pass
--- /dev/null
+# cr16 testcase for and $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global and
+and:
+ movb $3, r4
+ movb $6, r5
+
+ andb r4,r5
+
+ test_h_gr r5, 2
+
+ pass
--- /dev/null
+# cr16 testcase for and $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global and
+and:
+ movd $0x33333333, (r4,r3)
+ movd $0x66666666, (r6,r5)
+
+ andd (r4,r3), (r6,r5)
+
+ test_h_grp "(r6,r5)", 0x22222222
+
+ pass
--- /dev/null
+# cr16 testcase for and $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global and
+and:
+ movw $3, r4
+ movw $6, r5
+
+ andw r4, r5
+
+ test_h_gr r5, 2
+
+ pass
--- /dev/null
+# cr16 testcase for ashub $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global ashub
+ashub:
+
+ movw $0x12f1, r4
+ movw $4,r5
+ ashub r5, r4
+
+ cmpw $0x1210, r4
+ beq ok
+not_ok:
+ fail
+ok:
+ movw $0x12f1, r4
+ movw $-4,r5
+ ashub r5, r4
+
+ test_h_gr r4, 0x12ff
+
+ pass
--- /dev/null
+# cr16 testcase for ashub $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global ashub
+ashub:
+
+ movw $0x12f1, r4
+ ashub $4, r4
+
+ cmpw $0x1210, r4
+ beq ok
+not_ok:
+ fail
+ok:
+ movw $0x12f1, r4
+ ashub $-4, r4
+
+ test_h_gr r4, 0x12ff
+
+ pass
--- /dev/null
+# cr16 testcase for ashud $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global ashud
+ashud:
+
+ movd $0xf1234567, (r4,r3)
+ movw $20,r5
+ ashud r5, (r4,r3)
+
+ cmpd $0x56700000, (r4,r3)
+ beq ok
+not_ok:
+ fail
+ok:
+ movd $0xf1234567, (r4,r3)
+ movw $-20,r5
+ ashud r5, (r4,r3)
+
+ test_h_grp "(r4,r3)", -238
+
+ pass
--- /dev/null
+# cr16 testcase for ashud $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global ashud
+ashud:
+
+ movd $0xf1234567, (r4,r3)
+ ashud $20, (r4,r3)
+
+ cmpd $0x56700000, (r4,r3)
+ beq ok
+not_ok:
+ fail
+ok:
+ movd $0xf1234567, (r4,r3)
+ ashud $-20, (r4,r3)
+
+ test_h_grp "(r4,r3)", -238
+
+ pass
--- /dev/null
+# cr16 testcase for ashuw $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global ashuw
+ashuw:
+
+ movw $0x1ff1, r4
+ movw $12,r5
+ ashuw r5, r4
+
+ cmpw $0x1000, r4
+ beq ok
+not_ok:
+ fail
+ok:
+ movw $0x1ff1, r4
+ movw $-12,r5
+ ashuw r5, r4
+
+ test_h_gr r4, 0x1
+
+ pass
--- /dev/null
+# cr16 testcase for ashuw $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global ashuw
+ashuw:
+
+ movw $0x1ff1, r4
+ ashuw $12, r4
+
+ cmpw $0x1000, r4
+ beq ok
+not_ok:
+ fail
+ok:
+ movw $0x1ff1, r4
+ ashuw $-12, r4
+
+ test_h_gr r4, 0x1
+
+ pass
--- /dev/null
+# cr16 testcase for bal $disp24
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global bal24
+bal24:
+ bal (ra), ok
+
+ fail
+
+ok:
+ pass
--- /dev/null
+# cr16 testcase for bal $disp24
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global bal24
+bal24:
+ bal (r12), ok
+
+ fail
+
+ok:
+ pass
--- /dev/null
+# cr16 testcase for beq disp16
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global beq
+beq:
+ mvi_h_condbit 0
+ movw $12, r4
+ movw $10, r5
+ cmpw r4, r5
+ bcc ok
+not_ok:
+ fail
+ok:
+ movw $11, r5
+ cmpw r4, r5
+ beq not_ok
+
+ pass
--- /dev/null
+# cr16 testcase for bcs disp16
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global bcs
+bcs:
+ mvi_h_condbit 0
+ movw $12, r4
+ movw $10, r5
+ subw r4, r5
+ bcs ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for beq disp16
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global beq
+beq:
+ mvi_h_condbit 0
+ movw $12, r4
+ movw $12, r5
+ cmpw r4, r5
+ beq ok
+not_ok:
+ fail
+ok:
+ movw $11, r5
+ cmpw r4, r5
+ beq not_ok
+
+ pass
--- /dev/null
+# cr16 testcase for beq0b reg disp5
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global beq0b
+beq0b:
+ mvi_h_condbit 0
+ movw $0x1200, r4
+ beq0b r4, 0x1a
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for beq disp16
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global beq
+beq:
+ mvi_h_condbit 0
+ movw $0, r4
+ beq0b r4, 0x1a
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for beq disp16
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global beq
+beq:
+ mvi_h_condbit 0
+ movw $2, r4
+ movw $1, r5
+ cmpw r4, r5
+ bgt ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for beq disp16
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global beq
+beq:
+ mvi_h_condbit 0
+ movw $2, r4
+ movw $1, r5
+ cmpw r4, r5
+ bgt ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for beq disp16
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global beq
+beq:
+ mvi_h_condbit 0
+ movw $2, r4
+ movw $1, r5
+ cmpw r4, r5
+ bhi ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for bhi disp16
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global bhi
+bhi:
+ mvi_h_condbit 0
+ movw $2, r4
+ movw $1, r5
+ cmpw r4, r5
+ bhs ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for beq disp16
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global beq
+beq:
+ mvi_h_condbit 0
+ movw $1, r4
+ movw $2, r5
+ cmpw r4, r5
+ blt ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for beq disp16
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global beq
+beq:
+ mvi_h_condbit 0
+ movw $1, r4
+ movw $2, r5
+ cmpw r4, r5
+ blt ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for beq disp16
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global beq
+beq:
+ mvi_h_condbit 0
+ movw $1, r4
+ movw $2, r5
+ cmpw r4, r5
+ bls ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for beq disp16
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global beq
+beq:
+ mvi_h_condbit 0
+ movw $1, r4
+ movw $2, r5
+ cmpw r4, r5
+ blt ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for bnc $disp24
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global bnc24
+bnc24:
+ mvi_h_condbit 0
+ bnc.l test0pass
+
+test1fail:
+ fail
+test0pass:
+
+ mvi_h_condbit 1
+ bnc.l test1fail
+
+ pass
--- /dev/null
+# cr16 testcase for bnc $disp8
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global bnc8
+bnc8:
+ mvi_h_condbit 0
+ bnc.s test0pass
+
+test1fail:
+ fail
+
+test0pass:
+ mvi_h_condbit 1
+ bnc.s test1fail
+
+ pass
--- /dev/null
+# cr16 testcase for bne disp16
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global bne
+bne:
+ movw $1, r4
+ movw $2, r5
+ cmpw r4,r5
+ bne test0pass
+test1fail:
+ fail
+
+test0pass:
+ movw $1, r5
+ cmpw r4,r5
+ bne test1fail
+
+ pass
--- /dev/null
+# cr16 testcase for bne0b reg disp5
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global ne0b
+bne0b:
+ mvi_h_condbit 0
+ movw $0x1201, r4
+ bne0b r4, 0x1a
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for bne0w reg disp5
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global bne0w
+bne0w:
+ mvi_h_condbit 0
+ movw $1, r4
+ bne0w r4, 0x1a
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for bc $disp24
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global bc24
+bc24:
+
+ mvi_h_condbit 0
+ bne test0fail
+ br test0pass
+test0fail:
+ fail
+test0pass:
+
+ mvi_h_condbit 1
+ bne test1pass
+ fail
+test1pass:
+
+ pass
+
--- /dev/null
+# cr16 testcase for cmpb reg1, reg2
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global cmpb
+cmpb:
+ mvi_h_condbit 0
+ movw $0x2311, r4
+ movw $0x4211, r5
+ cmpb r4,r5
+ beq ok
+not_ok:
+ fail
+ok:
+ mvi_h_condbit 1
+ movw $0x4222, r5
+ cmpb r4,r5
+ beq not_ok
+
+ pass
--- /dev/null
+# cr16 testcase for cmpb $imm4, reg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global cmpb_i
+cmpb_i:
+ mvi_h_condbit 0
+ movw $0x2311, r4
+ cmpb $0x4211, r4
+ beq ok
+not_ok:
+ fail
+ok:
+ mvi_h_condbit 1
+ cmpb $0x4222,r4
+ beq not_ok
+
+ pass
--- /dev/null
+# cr16 testcase for cmpd (regp), (regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global cmpd
+cmpd:
+ mvi_h_condbit 0
+ movd $0x12345678, (r4,r3)
+ movd $0x12345678, (r6,r5)
+ cmpd (r4,r3), (r6,r5)
+ beq ok
+not_ok:
+ fail
+ok:
+ mvi_h_condbit 1
+ movd $0x12341234, (r6,r5)
+ cmpd (r4,r3), (r6,r5)
+ beq not_ok
+
+ pass
--- /dev/null
+# cr16 testcase for cmpb $imm32,(regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global cmpd_i
+cmpd_i:
+ mvi_h_condbit 0
+ movd $0x12345678, (r4,r3)
+ cmpd $0x12345678, (r4,r3)
+ beq ok
+not_ok:
+ fail
+ok:
+ mvi_h_condbit 1
+ cmpd $0x12341234, (r4,r3)
+ beq not_ok
+
+ pass
--- /dev/null
+# cr16 testcase for cmpi $src2,#$simm16
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global cmpi
+cmpi:
+ mvi_h_condbit 0
+ movw $1, r4
+ cmpw $1, r4
+ beq ok
+not_ok:
+ fail
+ok:
+ mvi_h_condbit 1
+ movw $2, r4
+ cmpw $2, r4
+ bne not_ok
+
+
+ pass
--- /dev/null
+# cr16 testcase for cmp $src1,$src2
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global cmp
+cmp:
+ mvi_h_condbit 0
+ movw $0x1234, r4
+ movw $0x1234, r5
+ cmpb r4,r5
+ beq ok
+not_ok:
+ fail
+ok:
+ mvi_h_condbit 1
+ movw $0x2222, r5
+ cmpw r4,r5
+ beq not_ok
+
+ pass
--- /dev/null
+# cr16 testcase for cmpw_i $imm16, reg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global cmpw_i
+cmpw_i:
+ mvi_h_condbit 0
+ movw $0x1234, r4
+ cmpw $0x1234, r4
+ beq ok
+not_ok:
+ fail
+ok:
+ mvi_h_condbit 1
+ cmpw $0x2222, r4
+ beq not_ok
+
+ pass
--- /dev/null
+# cr16 testcase for excp uimm4
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global excp
+excp:
+ pass # pass macro use the excp 8
+
+## Test 1: bbpsw = 0, bpsw = 1, psw = 0
+#
+# # bbsm = 0, bie = 0, bbcond = 0
+# movw $0, r4
+# lpr r4, cr8
+#
+# # bsm = 1, bie = 1, bcond = 1, sm = 0, ie = 0, cond = 0
+# movw $0xc100, r4
+# lpr r4, cr0
+#
+# # bbpc = 0
+# movw $0, r4
+# mvtc r4, bbpc
+#
+# # bpc = 42
+# mvaddr_h_gr r4, 42
+# mvtc r4, bpc
+#
+# # Copy excp2_handler to excp area of memory.
+# ld24 r0,#0x48 # address of excp 2 handler
+# ld24 r1,#excp2_handler
+# ld r2,@r1
+# st r2,@r0
+# # Set up return address.
+# ld24 r5,#excp2_ret1
+#
+#excp_insn1:
+# excp 2
+# fail
+#
+#excp2_ret1:
+# # test bbsm = 1, bbie = 1, bbcond = 1
+# mvfc r4, cr8
+# test_h_gr r4, 0xc1
+#
+# # test bsm = 0, bie = 0, bcond = 0, sm = 0, ie = 0, cond = 0
+# mvfc r4, cr0
+# test_h_gr r4, 0
+#
+# # test bbpc = 42
+# mvfc r4, bbpc
+# test_h_gr r4, 42
+#
+# # test bpc = proper return address
+# mvfc r4, bpc
+# test_h_gr r4, excp_insn1 + 4
+#
+## Test 2: bbpsw = 1, bpsw = 0, psw = 1
+#
+# # bbsm = 1, bie = 1, bbcond = 1
+# mvi_h_gr r4, 0xc1
+# mvtc r4, cr8
+#
+# # bsm = 0, bie = 0, bcond = 0, sm = 1, ie = 1, cond = 1
+# mvi_h_gr r4, 0xc1
+# mvtc r4, cr0
+#
+# # bbpc = 42
+# mvaddr_h_gr r4, 42
+# mvtc r4, bbpc
+#
+# # bpc = 0
+# mvaddr_h_gr r4, 0
+# mvtc r4, bpc
+#
+# # Set up return address.
+# ld24 r5,#excp2_ret2
+#
+#excp_insn2:
+# excp #2
+# fail
+#
+#excp2_ret2:
+# # test bbsm = 0, bbie = 0, bbcond = 0
+# mvfc r4, cr8
+# test_h_gr r4, 0
+#
+# # test bsm = 1, bie = 1, bcond = 1, sm = 1, ie = 0, cond = 0
+# mvfc r4, cr0
+# test_h_gr r4, 0xc180
+#
+# # test bbpc = 0
+# mvfc r4, bbpc
+# test_h_gr r4, 0
+#
+# # test bpc = proper return address
+# mvfc r4, bpc
+# test_h_gr r4, excp_insn2 + 4
+#
+# pass
+#
+# .data
+#
+## Don't use rte as it will undo the effects of excp we're testing.
+#
+# .p2align 2
+#excp2_handler:
+# jmp r5
+# nop
--- /dev/null
+# output(): Hello world!\n
+# mach(): cr16
+
+ .globl _start
+_start:
+
+# write (hello world)
+ movw $1,r2
+ movd $hello,(r4,r3)
+ loadw length,r5
+ movw $0x404,r0
+ excp 8
+# exit (0)
+ movw $0,r2
+ movw $0x410,r0
+ excp 8
+
+length: .long 14
+hello: .ascii "Hello world!\r\n"
--- /dev/null
+# cr16 testcase for jal $sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global jal
+jal:
+ movd $ok1, (r5, r4)
+ lshd $-1, (r5,r4)
+ jal (ra), (r5,r4)
+not_ok:
+ fail
+ok1:
+ movd $not_ok, (r7, r6)
+ lshd $-1, (r7,r6)
+ cmpd (r7,r6), (ra)
+ beq ok2
+ br not_ok
+ok2:
+ movd $ok3, (r5, r4)
+ lshd $-1, (r5,r4)
+ jal (r1,r0), (r5,r4)
+not_ok1:
+ br not_ok
+ok3:
+ movd $not_ok1, (r7, r6)
+ lshd $-1, (r7,r6)
+ cmpd (r7,r6), (r1,r0)
+ beq ok4
+ br not_ok
+ok4:
+
+ pass
--- /dev/null
+# cr16 testcase for jcc (regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global jcc
+jcc:
+ movd $ok, (r7,r6)
+ lshd $-1, (r7,r6)
+
+ mvi_h_condbit 0
+ movw $12, r4
+ movw $10, r5
+ cmpw r4, r5
+ jcc (r7,r6)
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for jcs (regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global jcs
+jcs:
+ movd $ok, (r7,r6)
+ lshd $-1, (r7,r6)
+
+ mvi_h_condbit 0
+ movw $12, r4
+ movw $10, r5
+ subw r4, r5
+ jcs (r7,r6)
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for jeq (regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global jeq
+jeq:
+ movd $ok, (r7,r6)
+ lshd $-1, (r7,r6)
+
+ mvi_h_condbit 0
+ movw $12, r4
+ movw $12, r5
+ cmpw r4, r5
+ jeq (r7,r6)
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for jfc (repl)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global jfc
+jfc:
+ movd $ok, (r7,r6)
+ lshd $-1, (r7,r6)
+
+ mvi_h_condbit 0
+ movw $2, r4
+ movw $1, r5
+ subw r4, r5
+ jfc (r7,r6)
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for jfs (repl)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global jfs
+jfs:
+ movd $ok, (r7,r6)
+ lshd $-1, (r7,r6)
+
+ mvi_h_condbit 0
+ movw $0xaa, r4
+ movw $0xaa, r5
+ addb r4, r5
+ jfs (r7,r6)
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for jge (regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global jge
+jge:
+ movd $ok, (r7,r6)
+ lshd $-1, (r7,r6)
+
+ mvi_h_condbit 0
+ movw $2, r4
+ movw $1, r5
+ cmpw r4, r5
+ jge (r7,r6)
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for jgt (regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global jgt
+jgt:
+ movd $ok, (r7,r6)
+ lshd $-1, (r7,r6)
+
+ mvi_h_condbit 0
+ movw $2, r4
+ movw $1, r5
+ cmpw r4, r5
+ jgt (r7,r6)
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for jeq (regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global jeq
+jeq:
+ movd $ok, (r7,r6)
+ lshd $-1, (r7,r6)
+
+ mvi_h_condbit 0
+ movw $2, r4
+ movw $1, r5
+ cmpw r4, r5
+ jhi (r7,r6)
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for jhs (regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global jhs
+jhs:
+ movd $ok, (r7,r6)
+ lshd $-1, (r7,r6)
+
+ mvi_h_condbit 0
+ movw $1, r4
+ movw $2, r5
+ subw r4, r5
+ jhs (r7,r6)
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for jlo (regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global jlo
+jlo:
+ movd $ok, (r7,r6)
+ lshd $-1, (r7,r6)
+
+ mvi_h_condbit 0
+ movw $1, r4
+ movw $2, r5
+ cmpw r4, r5
+ jlo (r7,r6)
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for jeq (regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global jeq
+jeq:
+ movd $ok, (r7,r6)
+ lshd $-1, (r7,r6)
+
+ mvi_h_condbit 0
+ movw $1, r4
+ movw $2, r5
+ cmpw r4, r5
+ jls (r7,r6)
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for jlt (repl)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global jlt
+jlt:
+ movd $ok, (r7,r6)
+ lshd $-1, (r7,r6)
+
+ mvi_h_condbit 0
+ movw $1, r4
+ movw $2, r5
+ cmpw r4, r5
+ jlt (r7,r6)
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for jne (regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global jne
+jne:
+ movd $ok, (r7,r6)
+ lshd $-1, (r7,r6)
+
+ mvi_h_condbit 0
+ movw $0, r4
+ movw $1, r5
+ cmpw r4, r5
+ jne (r7,r6)
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for jmp $sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global jmp
+jmp:
+ movd $ok1, (r4,r3)
+ jump (r4,r3)
+ fail
+ok1:
+ movd $ok2, (r4,r3)
+ jump (r4,r3)
+ fail
+ok2:
+ pass
--- /dev/null
+# cr16 testcase for loadb $sr,$dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global ldb
+ldb:
+ movd $data_loc, (r4,r3)
+ movw $0,r5
+
+ loadb 0(r4,r3),r5
+
+ test_h_gr r5, 0x78 # little endian processor
+
+ pass
+
+data_loc:
+ .word 0x5678
+
--- /dev/null
+# cr16 testcase for ldb $dr,@$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global ldb
+ldb:
+ movd $data_loc, (r4,r3)
+ movd $0,(r6,r5)
+
+ loadd 0(r4,r3),(r6,r5)
+
+ test_h_grp "(r6, r5)", 0x12345678 # little endian processor
+
+ pass
+
+data_loc:
+ .long 0x12345678
+
--- /dev/null
+# cr16 testcase for loadm count
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global loadm
+loadm:
+ movw $0x1000, r0
+ movw $0x12, r2
+ storw r2, 0x1000
+ movw $0x34, r3
+ storw r3, 0x1002
+ movw $0x56, r4
+ storw r4, 0x1004
+ movw $0x78, r5
+ storw r5, 0x1006
+
+ loadm $4
+
+ cmpw $0x12,r2
+ beq ok1
+not_ok:
+ fail
+ok1:
+ cmpw $0x34,r3
+ beq ok2
+ br not_ok
+ok2:
+ cmpw $0x56,r4
+ beq ok3
+ br not_ok
+ok3:
+ cmpw $0x78,r5
+ beq ok4
+ br not_ok
+ok4:
+ pass
+ pass
+
--- /dev/null
+# cr16 testcase for loadmp count
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global loadmp
+loadmp:
+ movd $0x1000, (r1,r0)
+ movw $0x12, r2
+ storw r2, 0x1000
+ movw $0x34, r3
+ storw r3, 0x1002
+ movw $0x56, r4
+ storw r4, 0x1004
+ movw $0x78, r5
+ storw r5, 0x1006
+
+ loadmp $4
+
+ cmpw $0x12,r2
+ beq ok1
+not_ok:
+ fail
+ok1:
+ cmpw $0x34,r3
+ beq ok2
+ br not_ok
+ok2:
+ cmpw $0x56,r4
+ beq ok3
+ br not_ok
+ok3:
+ cmpw $0x78,r5
+ beq ok4
+ br not_ok
+ok4:
+ pass
+
--- /dev/null
+# cr16 testcase for ldb $dr,@$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global ldb
+ldb:
+ movd $data_loc, (r4,r3)
+ movw $0,r5
+
+ loadw 0(r4,r3),r5
+
+ test_h_gr r5, 0x5678 # little endian processor
+
+ pass
+
+data_loc:
+ .word 0x5678
+
--- /dev/null
+# cr16 testcase for lpr reg, preg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global lpr
+lpr:
+ movw $0x1234,r3
+ lpr r3, psr
+
+ spr psr,r5
+
+
+ test_h_gr r5, 0x1234
+
+ pass
--- /dev/null
+# cr16 testcase for lprd reg, preg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global lprd
+lprd:
+ movd $0x12345678,(r4,r3)
+ lprd (r4,r3), psr
+
+ sprd psr,(r6,r5)
+
+
+ test_h_grp "(r6,r5)", 0x12345678
+
+ pass
--- /dev/null
+# cr16 testcase for sll $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global sll
+sll:
+ movb $6, r4
+ movb $1, r5
+ lshb r5, r4
+ test_h_gr r4, 12
+
+ pass
--- /dev/null
+# cr16 testcase for lshb_i $dr,#$uimm5
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global lshb_i
+lshb_i:
+ movb $6,r4
+ lshb $1, r4
+ test_h_gr r4, 12
+
+ pass
--- /dev/null
+# cr16 testcase for sll $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global sll
+sll:
+ movd $0x12345678, (r4,r3)
+ movw $0x10, r5
+ lshd r5, (r4,r3)
+ test_h_grp "(r4,r3)", 0x56780000
+
+ pass
--- /dev/null
+# cr16 testcase for lshb_i $dr,#$uimm5
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global lshb_i
+lshb_i:
+ movd $0x12345678,(r4,r3)
+ lshd $16, (r4,r3)
+ test_h_grp "(r4,r3)", 0x56780000
+
+ pass
--- /dev/null
+# cr16 testcase for sll $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global sll
+sll:
+ movw $0x1234, r4
+ movw $8, r5
+ lshw r5, r4
+ test_h_gr r4, 0x3400
+
+ pass
--- /dev/null
+# cr16 testcase for lshb_i $dr,#$uimm5
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global lshb_i
+lshb_i:
+ movw $0x1234,r4
+ lshw $8, r4
+ test_h_gr r4, 0x3400
+
+ pass
--- /dev/null
+# cr16 testcase for macqw reg, (regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start # REVIST to update testcase
+
+ .global macqw
+macqw:
+ movw $0x123,r3
+ movw $0x456,r4
+ macqw r3, r4, (r6,r5)
+ test_h_grp "(r6,r5)", 0x4edc2
+
+ pass
--- /dev/null
+# cr16 testcase for macsw reg, (regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global macsw # REVISIT to update this testcase
+macsw:
+ movw $0x123,r3
+ movw $0x456,r4
+ macsw r3,r4, (r6,r5)
+ test_h_grp "(r6,r5)", 0x4edc2
+
+ pass
--- /dev/null
+# cr16 testcase for macuw reg, reg, (regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start # REVIST to update testcase
+
+ .global macuw
+macuw:
+ movw $0x123,r3
+ movw $0x456,r4
+ macuw r3, r4, (r6,r5)
+ test_h_grp "(r6,r5)", 0x4edc2
+
+ pass
--- /dev/null
+# cr16 testcase for movb $sr,$dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global movb
+movb:
+ movb $1, r4
+ movb $0, r5
+
+ movb r4, r5
+
+ test_h_gr r5, 1
+
+ pass
--- /dev/null
+# cr16 testcase for movd $sr,$dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global movd
+movd:
+ movd $0x12345678, (r4,r3)
+
+ movd (r4,r3), (r6,r5)
+
+ test_h_grp "(r6,r5)", 0x12345678
+
+ pass
--- /dev/null
+# cr16 testcase for movw $sr,$dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global movw
+movw:
+ movw $0x1234, r4
+
+ movw r4, r5
+
+ test_h_gr r5, 0x1234
+
+ pass
--- /dev/null
+# cr16 testcase for movb $sr,$dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global movb
+movb:
+ movb $0xf, r4
+ movw $0x1234, r5
+
+ movxb r4, r5
+
+ test_h_gr r5, 0xf
+
+ pass
--- /dev/null
+# cr16 testcase for movw $sr,$dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global movw
+movw:
+ movw $0x1234, r4
+ movd $0, (r6,r5)
+
+ movxw r4, (r6,r5)
+
+ test_h_grp "(r6, r5)", 0x1234
+
+ pass
--- /dev/null
+# cr16 testcase for movb $sr,$dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global movb
+movb:
+ movw $0x120f, r4
+ movw $0x1200, r5
+
+ movzb r4, r5
+
+ test_h_gr r5, 0xf
+
+ pass
--- /dev/null
+# cr16 testcase for movw $sr,$dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global movw
+movw:
+ movb $0xff, r4
+ movd $0x12345678,(r6, r5)
+
+ movzw r4, (r6,r5)
+
+ test_h_grp "(r6, r5)", 0xff
+
+ pass
--- /dev/null
+# cr16 testcase for mulb $imm4/imm16/reg,$reg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global mulb
+mulb:
+ movw $0x2303,r4
+ movw $0x1207,r5
+
+ mulb r4, r5
+ cmpb $21, r5
+ beq ok1
+not_ok:
+ fail
+
+ok1:
+ movw $3,r4
+ mulb $7,r4
+ cmpb $21, r4
+ beq ok
+ br not_ok
+ok:
+ movw $3,r4
+ mulb $0x1207, r4
+ test_h_gr r4, 21
+
+ pass
--- /dev/null
+# cr16 testcase for mulsb $imm4/imm16/reg, reg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global mulsb
+mulsb:
+ movw $-3,r4
+ movw $7,r5
+
+ mulsb r4, r5
+ cmpw $-21, r5
+ beq ok1
+not_ok:
+ fail
+
+ok1:
+ movw $3,r4
+ mulw $7, r4
+ test_h_gr r4, 21
+
+ pass
--- /dev/null
+# cr16 testcase for mulsw reg, (regp)
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global mulsw
+mulsw:
+ movw $0xfff,r4 # fix for 0xffff
+ movd $0xffffffff,(r6,r5)
+
+ mulsw r4, (r6,r5)
+ test_h_grp "(r6,r5)", 0xfffff001
+
+ pass
--- /dev/null
+# cr16 testcase for mul $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global mul
+mul:
+ movw $0xfff,r4 # fix for 0xffff
+ movd $0xffffffff,(r6,r5)
+
+ muluw r4, (r6,r5)
+ test_h_grp "(r6,r5)", 0xfffff001
+
+ pass
--- /dev/null
+# cr16 testcase for mul $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global mul
+mul:
+ movw $0x1234,r4
+ movw $0x1234,r5
+
+ mulw r4, r5
+ cmpw $0x5a90, r5
+ beq ok1
+not_ok:
+ fail
+
+ok1:
+ mulw $0x1234, r4
+ test_h_gr r4, 0x5a90
+
+ pass
--- /dev/null
+# cr16 testcase for nop
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global nop
+nop:
+ nop
+ pass
--- /dev/null
+# cr16 testcase for or $sr,$dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global or
+or:
+ movb $3, r4
+ movb $6, r5
+
+ orb r4,r5
+
+ test_h_gr r5, 7
+
+ pass
--- /dev/null
+# cr16 testcase for or $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global or
+or:
+ movd $0x33333333, (r4,r3)
+ movd $0x66666666, (r6,r5)
+
+ ord (r4,r3), (r6,r5)
+
+ test_h_grp "(r6,r5)", 0x77777777
+
+ pass
--- /dev/null
+# cr16 testcase for or $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global or
+or:
+ movw $3, r4
+ movw $6, r5
+
+ orw r4, r5
+
+ test_h_gr r5, 7
+
+ pass
--- /dev/null
+# cr16 testcase for pop count reg RA insns.
+# mach: cr16
+
+ .include "testutils.inc"
+
+ start
+pop1:
+ movd $0x1000, (sp)
+ movw $0x2f50, r3
+ storw r3, 0x1000
+ movw $0x107e, r3
+ storw r3, 0x1002
+ movw $0x35ec, r3
+ storw r3, 0x1004
+
+ movd $0xabcd, (r3,r2)
+ stord (r3,r2), 0x1006
+
+ pop $3,r5, RA
+
+ cmpw $0x2f50,r5
+ beq ok1
+ br not_ok
+not_ok:
+ fail
+ok1:
+ cmpw $0x107e,r6
+ beq ok2
+ br not_ok
+ok2:
+ cmpw $0x35ec,r7
+ beq ok3
+ br not_ok
+
+ok3:
+ cmpd $0xabcd, (ra)
+ beq ok4
+ br not_ok
+ok4:
+ pass
--- /dev/null
+# cr16 testcase for pop count reg insns.
+# mach: cr16
+
+ .include "testutils.inc"
+
+ start
+pop2:
+ movd $0x1000, (sp)
+ movw $0x2f50, r3
+ storw r3, 0x1000
+ movw $0x107e, r3
+ storw r3, 0x1002
+ movw $0x35ec, r3
+ storw r3, 0x1004
+
+ pop $3,r5
+
+ cmpw $0x2f50,r5
+ beq ok1
+ br not_ok
+not_ok:
+ fail
+ok1:
+ cmpw $0x107e,r6
+ beq ok2
+ br not_ok
+ok2:
+ cmpw $0x35ec,r7
+ beq ok3
+ br not_ok
+
+ok3:
+ pass
--- /dev/null
+# cr16 testcase for pop RA insns.
+# mach: cr16
+
+ .include "testutils.inc"
+
+ start
+pop3:
+ movd $0x1006, (sp)
+ movd $0xabcd, (r3,r2)
+ stord (r3,r2), 0x1006
+ pop RA
+
+
+ cmpd $0xabcd, (ra)
+ beq ok
+ br not_ok
+not_ok:
+ fail
+ok:
+ pass
+
+
--- /dev/null
+# cr16 testcase for popret count reg RA insns.
+# mach: cr16
+
+ .include "testutils.inc"
+
+ start
+popret1:
+ movd $0x1000, (sp)
+ movw $0x2f50, r3
+ storw r3, 0x1000
+ movw $0x107e, r3
+ storw r3, 0x1002
+ movw $0x35ec, r3
+ storw r3, 0x1004
+
+ movd $ok, (r3,r2) # jump to ok
+ lshd $-1, (r3,r2)
+ stord (r3,r2), 0x1006
+
+ popret $3,r5, RA
+
+ok:
+ cmpw $0x2f50,r5
+ beq ok1
+ br not_ok
+not_ok:
+ fail
+ok1:
+ cmpw $0x107e,r6
+ beq ok2
+ br not_ok
+ok2:
+ cmpw $0x35ec,r7
+ beq ok3
+ br not_ok
+
+ok3:
+ pass
--- /dev/null
+# cr16 testcase for popret count reg insns.
+# mach: cr16
+
+ .include "testutils.inc"
+
+ start
+popret2:
+ movd $0x1000, (sp)
+ movw $0x2f50, r3
+ storw r3, 0x1000
+ movw $0x107e, r3
+ storw r3, 0x1002
+ movw $0x35ec, r3
+ storw r3, 0x1004
+
+ movd $ok, (ra)
+ lshd $-1, (ra)
+ stord (ra), 0x1006
+
+ popret $3,r5
+
+ok:
+ cmpw $0x2f50,r5
+ beq ok1
+ br not_ok
+not_ok:
+ fail
+ok1:
+ cmpw $0x107e,r6
+ beq ok2
+ br not_ok
+ok2:
+ cmpw $0x35ec,r7
+ beq ok3
+ br not_ok
+
+ok3:
+ pass
--- /dev/null
+# cr16 testcase for popret RA insns.
+# mach: cr16
+
+ .include "testutils.inc"
+
+ start
+popret3:
+ movd $0x1006, (sp)
+ movd $ok, (ra)
+ lshd $-1, (ra)
+ stord (ra), 0x1006
+ popret RA
+
+ok:
+ pass
--- /dev/null
+# cr16 testcase for push count reg RA insns.
+# mach: cr16
+
+ .include "testutils.inc"
+
+ start
+push1:
+ movd $0x100a, (sp)
+ movd $0xabcd, (ra)
+ movw $0x2f50, r5
+ movw $0x107e, r6
+ movw $0x35ed, r7
+ push $3,r5,RA
+
+ loadw 0x1000, r3
+ cmpw r3,r5
+ beq ok1
+ br not_ok
+not_ok:
+ fail
+ok1:
+ loadw 0x1002, r3
+ cmpw r3,r6
+ beq ok2
+ br not_ok
+ok2:
+ loadw 0x1004, r3
+ cmpw r3,r7
+ beq ok3
+ br not_ok
+
+ok3:
+ loadd 0x1006, (r3,r2)
+ cmpd (r3,r2), (ra)
+ beq ok4
+ br not_ok
+
+ok4:
+ pass
--- /dev/null
+# cr16 testcase for push count reg insns.
+# mach: cr16
+
+ .include "testutils.inc"
+
+ start
+push2:
+ movd $0x1006, (sp)
+ movw $0x2f50, r5
+ movw $0x107e, r6
+ movw $0x35ed, r7
+ push $3,r5
+
+ loadw 0x1000, r3
+ cmpw r3,r5
+ beq ok1
+ br not_ok
+not_ok:
+ fail
+ok1:
+ loadw 0x1002, r3
+ cmpw r3,r6
+ beq ok2
+ br not_ok
+ok2:
+ loadw 0x1004, r3
+ cmpw r3,r7
+ beq ok3
+ br not_ok
+
+ok3:
+ pass
+
+
--- /dev/null
+# cr16 testcase for push RA insns.
+# mach: cr16
+
+ .include "testutils.inc"
+
+ start
+push1:
+ movd $0x1006, (sp)
+ movd $0xabcd, (ra)
+ push RA
+
+
+ loadd 0x1002, (r3,r2)
+ cmpd (r3,r2), (ra)
+ beq ok
+ br not_ok
+not_ok:
+ fail
+ok:
+ pass
+
+
--- /dev/null
+# cr16 testcase for ret
+# mach: cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global ret
+ret:
+ set_spr_addr ok1,lr
+ set_icc 0x0 0
+ ret
+ fail
+ok1:
+ set_spr_addr ok2,lr
+ set_icc 0x1 1
+ ret
+ fail
+ok2:
+ set_spr_addr ok3,lr
+ set_icc 0x2 2
+ ret
+ fail
+ok3:
+ set_spr_addr ok4,lr
+ set_icc 0x3 3
+ ret
+ fail
+ok4:
+ set_spr_addr ok5,lr
+ set_icc 0x4 0
+ ret
+ fail
+ok5:
+ set_spr_addr ok6,lr
+ set_icc 0x5 1
+ ret
+ fail
+ok6:
+ set_spr_addr ok7,lr
+ set_icc 0x6 2
+ ret
+ fail
+ok7:
+ set_spr_addr ok8,lr
+ set_icc 0x7 3
+ ret
+ fail
+ok8:
+ set_spr_addr ok9,lr
+ set_icc 0x8 0
+ ret
+ fail
+ok9:
+ set_spr_addr oka,lr
+ set_icc 0x9 1
+ ret
+ fail
+oka:
+ set_spr_addr okb,lr
+ set_icc 0xa 2
+ ret
+ fail
+okb:
+ set_spr_addr okc,lr
+ set_icc 0xb 3
+ ret
+ fail
+okc:
+ set_spr_addr okd,lr
+ set_icc 0xc 0
+ ret
+ fail
+okd:
+ set_spr_addr oke,lr
+ set_icc 0xd 1
+ ret
+ fail
+oke:
+ set_spr_addr okf,lr
+ set_icc 0xe 2
+ ret
+ fail
+okf:
+ set_spr_addr okg,lr
+ set_icc 0xf 3
+ ret
+ fail
+okg:
+
+ pass
--- /dev/null
+# cr16 testcase for scc reg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global scc
+scc:
+ mvi_h_condbit 0
+ movw $12, r4
+ movw $10, r5
+ cmpw r4, r5
+ scc r3
+
+ cmpw $1, r3
+ beq ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for scs reg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global scs
+scs:
+ mvi_h_condbit 0
+ movw $12, r4
+ movw $10, r5
+ subw r4, r5
+ scs r3
+
+ cmpw $1, r3
+ beq ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for seq reg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global seq
+seq:
+ mvi_h_condbit 0
+ movw $12, r4
+ movw $12, r5
+ cmpw r4, r5
+ seq r3
+ cmpw $1, r3
+ beq ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for sfc rep
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global sfc
+sfc:
+ mvi_h_condbit 0
+ movw $2, r4
+ movw $1, r5
+ subw r4, r5
+ sfc r3
+ cmpw $1, r3
+ beq ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for sfs reg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global sfs
+sfs:
+ mvi_h_condbit 0
+ movw $0xaa, r4
+ movw $0xaa, r5
+ addb r4, r5
+ sfs r3
+
+ cmpw $1, r3
+ beq ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for sge reg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global sge
+sge:
+ mvi_h_condbit 0
+ movw $2, r4
+ movw $1, r5
+ cmpw r4, r5
+ sge r3
+ cmpw $1, r3
+ beq ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for sgt reg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global sgt
+sgt:
+ mvi_h_condbit 0
+ movw $2, r4
+ movw $1, r5
+ cmpw r4, r5
+ sgt r3
+ cmpw $1, r3
+ beq ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for shi reg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global shi
+shi:
+ mvi_h_condbit 0
+ movw $2, r4
+ movw $1, r5
+ cmpw r4, r5
+ shi r3
+
+ cmpw $1,r3
+ beq ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for shs reg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global shs
+shs:
+ mvi_h_condbit 0
+ movw $1, r4
+ movw $2, r5
+ subw r4, r5
+ shs r3
+
+ cmpw $1, r3
+ beq ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for slo reg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global slo
+slo:
+ mvi_h_condbit 0
+ movw $1, r4
+ movw $2, r5
+ cmpw r4, r5
+ slo r3
+
+ cmpw $1, r3
+ beq ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for sls reg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global sls
+sls:
+ mvi_h_condbit 0
+ movw $1, r4
+ movw $2, r5
+ cmpw r4, r5
+ sls r3
+
+ cmpw $1, r3
+ beq ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for slt rep
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global slt
+slt:
+ mvi_h_condbit 0
+ movw $1, r4
+ movw $2, r5
+ cmpw r4, r5
+ slt r3
+
+ cmpw $1,r3
+ beq ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for sne reg
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global sne
+sne:
+ mvi_h_condbit 0
+ movw $0, r4
+ movw $1, r5
+ cmpw r4, r5
+ sne r3
+
+ cmpw $1, r3
+ beq ok
+not_ok:
+ fail
+ok:
+ pass
--- /dev/null
+# cr16 testcase for st $src1,@$src2
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global st
+st:
+ movd $data_loc, (r4,r3)
+ movw $1,r5
+
+ storw r5, 0(r4,r3)
+
+ loadw 0(r4,r3),r1
+ test_h_gr r1, 1
+
+ pass
+
+data_loc:
+ .word 0
--- /dev/null
+# cr16 testcase for st $src1,@$src2
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global st
+st:
+ movd $data_loc, (r4,r3)
+ movd $0x12345678, (r6,r5)
+
+ stord (r6,r5),0(r4,r3)
+
+ loadd 0(r4,r3), (r1,r0)
+ test_h_grp "( r1,r0)", 0x12345678
+
+ pass
+
+data_loc:
+ .word 0
--- /dev/null
+# cr16 testcase for st $src1,@$src2
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global st
+st:
+ movd $data_loc, (r4,r3)
+ movw $0x1234,r5
+
+ storw r5,0(r4,r3)
+
+ loadw 0(r4,r3),r1
+ test_h_gr r1, 0x1234
+
+ pass
+
+data_loc:
+ .word 0
--- /dev/null
+# cr16 testcase for subb $sr,$dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global subb
+subb:
+
+ movb $7, r4
+ movb $3, r5
+
+ subb r5, r4
+
+ test_h_gr r4, 4
+
+ pass
--- /dev/null
+# cr16 testcase for subd $sr,$dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global subd
+subd:
+
+ movd $0x12345678, (r4,r3)
+ movd $0x11111111, (r6,r5)
+
+ subd (r6,r5), (r4,r3)
+
+ test_h_grp "(r4,r3)", 0x1234567
+
+ pass
--- /dev/null
+# cr16 testcase for addi #$simm8, $dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global addi
+addi:
+
+ movb $1, r4
+ addb $2, r4
+
+ cmpb $3,r4
+ bne not_ok
+
+ movw $0x1234, r5
+ addw $0x1234, r5
+ test_h_gr r5, 0x2468
+
+ pass
+
+ movd $0x12345678, (r5,r4)
+ addd $0x12345678, (r5,r4)
+ test_h_grp "(r5,r4)", 0x2468acf0
+
+ pass
+
+not_ok:
+ fail
--- /dev/null
+# cr16 testcase for subw $sr,$dr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global subw
+subw:
+
+ movw $0x1234, r4
+ movw $0x1111, r5
+
+ subw r5, r4
+
+ test_h_gr r4, 0x123
+
+ pass
--- /dev/null
+# cr16 testcase for xor $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global xor
+xor:
+ movb $3, r4
+ movb $6, r5
+
+ xorb r4,r5
+
+ test_h_gr r5, 5
+
+ pass
--- /dev/null
+# cr16 testcase for xor $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global xor
+xor:
+ movd $0x33333333, (r4,r3)
+ movd $0x66666666, (r6,r5)
+
+ xord (r4,r3), (r6,r5)
+
+ test_h_grp "(r6,r5)", 0x55555555
+
+ pass
--- /dev/null
+# cr16 testcase for xor $dr,$sr
+# mach(): cr16
+
+ .include "testutils.inc"
+
+ start
+
+ .global xor
+xor:
+ movw $3, r4
+ movw $6, r5
+
+ xorw r4, r5
+
+ test_h_gr r5, 5
+
+ pass
projects / external / binutils.git / commitdiff