radeonsi/vcn: fix decoding bs buffer alignement issue.
authorRuijing Dong <ruijing.dong@amd.com>
Thu, 4 May 2023 01:20:51 +0000 (21:20 -0400)
committerMarge Bot <emma+marge@anholt.net>
Fri, 5 May 2023 14:20:21 +0000 (14:20 +0000)
reason:
  in some cases, bs buffer size could cause assertion,
  and some bitstreams of certain resolutions could
  not be decoded.

solution:
  to align the bs buffer to 128.

fixes: 4f1646d73fa8bac82ff2195f06a5f6011853f647

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22844>

src/gallium/drivers/radeonsi/radeon_vcn_dec.c

index 6088c12..c78f738 100644 (file)
@@ -3130,7 +3130,7 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
          dec->h264_valid_poc_num[i] = (unsigned) -1;
    }
 
-   bs_buf_size = width * height / 32;
+   bs_buf_size = align(width * height / 32, 128);
    for (i = 0; i < NUM_BUFFERS; ++i) {
       unsigned msg_fb_it_probs_size = FB_BUFFER_OFFSET + FB_BUFFER_SIZE;
       if (have_it(dec))