drm/i915: Add EU stride runtime parameter

Add a new SSEU runtime parameter, eu_stride, which is
used to mirror the userspace concept of a range of EUs
per subslice.

This patch simply adds the parameter and updates usage
in the QUERY_TOPOLOGY_INFO handler.

v2: Add GEM_BUG_ON to make sure eu_stride is valid

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190823160307.180813-5-stuart.summers@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c b/drivers/gpu/drm/i915/gt/intel_sseu.c
index edf39ae..d52686a 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_sseu.c
+++ b/drivers/gpu/drm/i915/gt/intel_sseu.c
@@ -17,6 +17,8 @@ void intel_sseu_set_info(struct sseu_dev_info *sseu, u8 max_slices,
 
        sseu->ss_stride = GEN_SSEU_STRIDE(sseu->max_subslices);
        GEM_BUG_ON(sseu->ss_stride > GEN_MAX_SUBSLICE_STRIDE);
+       sseu->eu_stride = GEN_SSEU_STRIDE(sseu->max_eus_per_subslice);
+       GEM_BUG_ON(sseu->eu_stride > GEN_MAX_EU_STRIDE);
 }
 
 unsigned int

diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.h b/drivers/gpu/drm/i915/gt/intel_sseu.h
index 8b8b562..7f2355c 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_sseu.h
+++ b/drivers/gpu/drm/i915/gt/intel_sseu.h
@@ -16,6 +16,8 @@ struct drm_i915_private;
 #define GEN_MAX_SUBSLICES      (8) /* ICL upper bound */
 #define GEN_SSEU_STRIDE(max_entries) DIV_ROUND_UP(max_entries, BITS_PER_BYTE)
 #define GEN_MAX_SUBSLICE_STRIDE GEN_SSEU_STRIDE(GEN_MAX_SUBSLICES)
+#define GEN_MAX_EUS            (10) /* HSW upper bound */
+#define GEN_MAX_EU_STRIDE GEN_SSEU_STRIDE(GEN_MAX_EUS)
 
 struct sseu_dev_info {
        u8 slice_mask;
@@ -35,6 +37,7 @@ struct sseu_dev_info {
        u8 max_eus_per_subslice;
 
        u8 ss_stride;
+       u8 eu_stride;
 
        /* We don't have more than 8 eus per subslice at the moment and as we
         * store eus enabled using bits, no need to multiply by eus per

diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
index d8e25dc..abac504 100644 (file)
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -37,7 +37,6 @@ static int query_topology_info(struct drm_i915_private *dev_priv,
        const struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
        struct drm_i915_query_topology_info topo;
        u32 slice_length, subslice_length, eu_length, total_length;
-       u8 eu_stride = GEN_SSEU_STRIDE(sseu->max_eus_per_subslice);
        int ret;
 
        if (query_item->flags != 0)
@@ -50,7 +49,7 @@ static int query_topology_info(struct drm_i915_private *dev_priv,
 
        slice_length = sizeof(sseu->slice_mask);
        subslice_length = sseu->max_slices * sseu->ss_stride;
-       eu_length = sseu->max_slices * sseu->max_subslices * eu_stride;
+       eu_length = sseu->max_slices * sseu->max_subslices * sseu->eu_stride;
        total_length = sizeof(topo) + slice_length + subslice_length +
                       eu_length;
 
@@ -70,7 +69,7 @@ static int query_topology_info(struct drm_i915_private *dev_priv,
        topo.subslice_offset = slice_length;
        topo.subslice_stride = sseu->ss_stride;
        topo.eu_offset = slice_length + subslice_length;
-       topo.eu_stride = eu_stride;
+       topo.eu_stride = sseu->eu_stride;
 
        if (__copy_to_user(u64_to_user_ptr(query_item->data_ptr),
                           &topo, sizeof(topo)))

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 77d7bba..b1a79ed 100644 (file)
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -118,10 +118,9 @@ void intel_device_info_dump_runtime(const struct intel_runtime_info *info,
 static int sseu_eu_idx(const struct sseu_dev_info *sseu, int slice,
                       int subslice)
 {
-       int subslice_stride = GEN_SSEU_STRIDE(sseu->max_eus_per_subslice);
-       int slice_stride = sseu->max_subslices * subslice_stride;
+       int slice_stride = sseu->max_subslices * sseu->eu_stride;
 
-       return slice * slice_stride + subslice * subslice_stride;
+       return slice * slice_stride + subslice * sseu->eu_stride;
 }
 
 static u16 sseu_get_eus(const struct sseu_dev_info *sseu, int slice,
@@ -130,7 +129,7 @@ static u16 sseu_get_eus(const struct sseu_dev_info *sseu, int slice,
        int i, offset = sseu_eu_idx(sseu, slice, subslice);
        u16 eu_mask = 0;
 
-       for (i = 0; i < GEN_SSEU_STRIDE(sseu->max_eus_per_subslice); i++) {
+       for (i = 0; i < sseu->eu_stride; i++) {
                eu_mask |= ((u16)sseu->eu_mask[offset + i]) <<
                        (i * BITS_PER_BYTE);
        }
@@ -143,7 +142,7 @@ static void sseu_set_eus(struct sseu_dev_info *sseu, int slice, int subslice,
 {
        int i, offset = sseu_eu_idx(sseu, slice, subslice);
 
-       for (i = 0; i < GEN_SSEU_STRIDE(sseu->max_eus_per_subslice); i++) {
+       for (i = 0; i < sseu->eu_stride; i++) {
                sseu->eu_mask[offset + i] =
                        (eu_mask >> (BITS_PER_BYTE * i)) & 0xff;
        }